Line data Source code
1 : /* +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
2 : Copyright (c) 2008-2017, Petr Kobalicek
3 :
4 : This software is provided 'as-is', without any express or implied
5 : warranty. In no event will the authors be held liable for any damages
6 : arising from the use of this software.
7 :
8 : Permission is granted to anyone to use this software for any purpose,
9 : including commercial applications, and to alter it and redistribute it
10 : freely, subject to the following restrictions:
11 :
12 : 1. The origin of this software must not be misrepresented; you must not
13 : claim that you wrote the original software. If you use this software
14 : in a product, an acknowledgment in the product documentation would be
15 : appreciated but is not required.
16 : 2. Altered source versions must be plainly marked as such, and must not be
17 : misrepresented as being the original software.
18 : 3. This notice may not be removed or altered from any source distribution.
19 : +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ */
20 : #ifndef __PLUMED_asmjit_x86operand_h
21 : #define __PLUMED_asmjit_x86operand_h
22 : #ifdef __PLUMED_HAS_ASMJIT
23 : #pragma GCC diagnostic push
24 : #pragma GCC diagnostic ignored "-Wpedantic"
25 : // [AsmJit]
26 : // Complete x86/x64 JIT and Remote Assembler for C++.
27 : //
28 : // [License]
29 : // Zlib - See LICENSE.md file in the package.
30 :
31 : // [Guard]
32 : #ifndef _ASMJIT_X86_X86OPERAND_H
33 : #define _ASMJIT_X86_X86OPERAND_H
34 :
35 : // [Dependencies]
36 : #include "./arch.h"
37 : #include "./operand.h"
38 : #include "./utils.h"
39 : #include "./x86globals.h"
40 :
41 : // [Api-Begin]
42 : #include "./asmjit_apibegin.h"
43 :
44 : namespace PLMD {
45 : namespace asmjit {
46 :
47 : // ============================================================================
48 : // [Forward Declarations]
49 : // ============================================================================
50 :
51 : class X86Mem;
52 : class X86Reg;
53 : class X86Vec;
54 :
55 : class X86Gp;
56 : class X86Gpb;
57 : class X86GpbLo;
58 : class X86GpbHi;
59 : class X86Gpw;
60 : class X86Gpd;
61 : class X86Gpq;
62 : class X86Fp;
63 : class X86Mm;
64 : class X86KReg;
65 : class X86Xmm;
66 : class X86Ymm;
67 : class X86Zmm;
68 : class X86Bnd;
69 : class X86Seg;
70 : class X86Rip;
71 : class X86CReg;
72 : class X86DReg;
73 :
74 : //! \addtogroup asmjit_x86
75 : //! \{
76 :
77 : // ============================================================================
78 : // [asmjit::X86Mem]
79 : // ============================================================================
80 :
81 : //! Memory operand (X86).
82 : class X86Mem : public Mem {
83 : public:
84 : //! Additional bits of operand's signature used by `X86Mem`.
85 : ASMJIT_ENUM(AdditionalBits) {
86 : kSignatureMemShiftShift = 19,
87 : kSignatureMemShiftBits = 0x03U,
88 : kSignatureMemShiftMask = kSignatureMemShiftBits << kSignatureMemShiftShift,
89 :
90 : kSignatureMemSegmentShift = 21,
91 : kSignatureMemSegmentBits = 0x07U,
92 : kSignatureMemSegmentMask = kSignatureMemSegmentBits << kSignatureMemSegmentShift
93 : };
94 :
95 : // --------------------------------------------------------------------------
96 : // [Construction / Destruction]
97 : // --------------------------------------------------------------------------
98 :
99 : //! Construct a default `X86Mem` operand, that points to [0].
100 : ASMJIT_INLINE X86Mem() noexcept : Mem(NoInit) { reset(); }
101 : ASMJIT_INLINE X86Mem(const X86Mem& other) noexcept : Mem(other) {}
102 :
103 : ASMJIT_INLINE X86Mem(const Label& base, int32_t off, uint32_t size = 0, uint32_t flags = 0) noexcept : Mem(NoInit) {
104 : uint32_t signature = (Label::kLabelTag << kSignatureMemBaseTypeShift ) |
105 : (size << kSignatureSizeShift ) ;
106 :
107 : _init_packed_d0_d1(kOpMem | signature | flags, 0);
108 : _mem.base = base.getId();
109 : _mem.offsetLo32 = static_cast<uint32_t>(off);
110 : }
111 :
112 : ASMJIT_INLINE X86Mem(const Label& base, const Reg& index, uint32_t shift, int32_t off, uint32_t size = 0, uint32_t flags = 0) noexcept : Mem(NoInit) {
113 : ASMJIT_ASSERT(shift <= kSignatureMemShiftMask);
114 : uint32_t signature = (Label::kLabelTag << kSignatureMemBaseTypeShift ) |
115 : (index.getType() << kSignatureMemIndexTypeShift) |
116 : (shift << kSignatureMemShiftShift ) |
117 : (size << kSignatureSizeShift ) ;
118 :
119 : _init_packed_d0_d1(kOpMem | signature | flags, index.getId());
120 : _mem.base = base.getId();
121 : _mem.offsetLo32 = static_cast<uint32_t>(off);
122 : }
123 :
124 : ASMJIT_INLINE X86Mem(const Reg& base, int32_t off, uint32_t size = 0, uint32_t flags = 0) noexcept : Mem(NoInit) {
125 6068 : uint32_t signature = (base.getType() << kSignatureMemBaseTypeShift ) |
126 : (size << kSignatureSizeShift ) ;
127 :
128 6068 : _init_packed_d0_d1(kOpMem | signature | flags, 0);
129 6068 : _mem.base = base.getId();
130 6068 : _mem.offsetLo32 = static_cast<uint32_t>(off);
131 : }
132 :
133 : ASMJIT_INLINE X86Mem(const Reg& base, const Reg& index, uint32_t shift, int32_t off, uint32_t size = 0, uint32_t flags = 0) noexcept : Mem(NoInit) {
134 : ASMJIT_ASSERT(shift <= kSignatureMemShiftMask);
135 : uint32_t signature = (base.getType() << kSignatureMemBaseTypeShift ) |
136 : (index.getType() << kSignatureMemIndexTypeShift) |
137 : (shift << kSignatureMemShiftShift ) |
138 : (size << kSignatureSizeShift ) ;
139 :
140 : _init_packed_d0_d1(kOpMem | signature | flags, index.getId());
141 : _mem.base = base.getId();
142 : _mem.offsetLo32 = static_cast<uint32_t>(off);
143 : }
144 :
145 : ASMJIT_INLINE X86Mem(uint64_t base, uint32_t size = 0, uint32_t flags = 0) noexcept : Mem(NoInit) {
146 : _init_packed_d0_d1(kOpMem | flags | (size << kSignatureSizeShift), 0);
147 : _mem.offset64 = base;
148 : }
149 :
150 : ASMJIT_INLINE X86Mem(uint64_t base, const Reg& index, uint32_t shift = 0, uint32_t size = 0, uint32_t flags = 0) noexcept : Mem(NoInit) {
151 : ASMJIT_ASSERT(shift <= kSignatureMemShiftMask);
152 : uint32_t signature = (index.getType() << kSignatureMemIndexTypeShift) |
153 : (shift << kSignatureMemShiftShift ) |
154 : (size << kSignatureSizeShift ) ;
155 :
156 : _init_packed_d0_d1(kOpMem | signature | flags, index.getId());
157 : _mem.offset64 = base;
158 : }
159 :
160 : ASMJIT_INLINE X86Mem(const _Init& init,
161 : uint32_t baseType, uint32_t baseId,
162 : uint32_t indexType, uint32_t indexId,
163 : int32_t off, uint32_t size, uint32_t flags) noexcept : Mem(init, baseType, baseId, indexType, indexId, off, size, flags) {}
164 :
165 : explicit ASMJIT_INLINE X86Mem(const _NoInit&) noexcept : Mem(NoInit) {}
166 :
167 : // --------------------------------------------------------------------------
168 : // [X86Mem]
169 : // --------------------------------------------------------------------------
170 :
171 : //! Clone the memory operand.
172 : ASMJIT_INLINE X86Mem clone() const noexcept { return X86Mem(*this); }
173 :
174 : using Mem::setIndex;
175 :
176 : ASMJIT_INLINE void setIndex(const Reg& index, uint32_t shift) noexcept {
177 : setIndex(index);
178 : setShift(shift);
179 : }
180 :
181 : //! Get if the memory operand has shift (aka scale) constant.
182 : ASMJIT_INLINE bool hasShift() const noexcept { return _hasSignatureData(kSignatureMemShiftMask); }
183 : //! Get the memory operand's shift (aka scale) constant.
184 : ASMJIT_INLINE uint32_t getShift() const noexcept { return _getSignatureData(kSignatureMemShiftBits, kSignatureMemShiftShift); }
185 : //! Set the memory operand's shift (aka scale) constant.
186 : ASMJIT_INLINE void setShift(uint32_t shift) noexcept { _setSignatureData(shift, kSignatureMemShiftBits, kSignatureMemShiftShift); }
187 : //! Reset the memory operand's shift (aka scale) constant to zero.
188 : ASMJIT_INLINE void resetShift() noexcept { _signature &= ~kSignatureMemShiftMask; }
189 :
190 : //! Get if the memory operand has a segment override.
191 : ASMJIT_INLINE bool hasSegment() const noexcept { return _hasSignatureData(kSignatureMemSegmentMask); }
192 : //! Get associated segment override as `X86Seg` operand.
193 : ASMJIT_INLINE X86Seg getSegment() const noexcept;
194 : //! Set the segment override to `seg`.
195 : ASMJIT_INLINE void setSegment(const X86Seg& seg) noexcept;
196 :
197 : //! Get segment override as id, see \ref X86Seg::Id.
198 : ASMJIT_INLINE uint32_t getSegmentId() const noexcept { return _getSignatureData(kSignatureMemSegmentBits, kSignatureMemSegmentShift); }
199 : //! Set the segment override to `id`.
200 : ASMJIT_INLINE void setSegmentId(uint32_t sId) noexcept { _setSignatureData(sId, kSignatureMemSegmentBits, kSignatureMemSegmentShift); }
201 : //! Reset the segment override.
202 : ASMJIT_INLINE void resetSegment() noexcept { _signature &= ~kSignatureMemSegmentMask; }
203 :
204 : //! Get new memory operand adjusted by `off`.
205 : ASMJIT_INLINE X86Mem adjusted(int64_t off) const noexcept {
206 : X86Mem result(*this);
207 : result.addOffset(off);
208 : return result;
209 : }
210 :
211 : // --------------------------------------------------------------------------
212 : // [Operator Overload]
213 : // --------------------------------------------------------------------------
214 :
215 : ASMJIT_INLINE X86Mem& operator=(const X86Mem& other) noexcept { copyFrom(other); return *this; }
216 : };
217 :
218 : // ============================================================================
219 : // [asmjit::X86Reg]
220 : // ============================================================================
221 :
222 : //! Register traits (X86/X64).
223 : //!
224 : //! Register traits contains information about a particular register type. It's
225 : //! used by asmjit to setup register information on-the-fly and to populate
226 : //! tables that contain register information (this way it's possible to change
227 : //! register types and kinds without having to reorder these tables).
228 : template<uint32_t RegType>
229 : struct X86RegTraits {
230 : enum {
231 : kValid = 0, //!< RegType is not valid by default.
232 : kCount = 0, //!< Count of registers (0 if none).
233 : kTypeId = TypeId::kVoid, //!< Everything is void by default.
234 :
235 : kType = 0, //!< Zero type by default.
236 : kKind = 0, //!< Zero kind by default.
237 : kSize = 0, //!< No size by default.
238 : kSignature = 0 //!< No signature by default.
239 : };
240 : };
241 :
242 : //! Register (X86/X64).
243 : class X86Reg : public Reg {
244 : public:
245 : //! Register type.
246 : //!
247 : //! Don't change these constants; they are essential to some built-in tables.
248 : ASMJIT_ENUM(RegType) {
249 : kRegNone = Reg::kRegNone, //!< No register type or invalid register.
250 :
251 : kRegGpbLo = Reg::kRegGp8Lo, //!< Low GPB register (AL, BL, CL, DL, ...).
252 : kRegGpbHi = Reg::kRegGp8Hi, //!< High GPB register (AH, BH, CH, DH only).
253 : kRegGpw = Reg::kRegGp16, //!< GPW register.
254 : kRegGpd = Reg::kRegGp32, //!< GPD register.
255 : kRegGpq = Reg::kRegGp64, //!< GPQ register (X64).
256 : kRegXmm = Reg::kRegVec128, //!< XMM register (SSE+).
257 : kRegYmm = Reg::kRegVec256, //!< YMM register (AVX+).
258 : kRegZmm = Reg::kRegVec512, //!< ZMM register (AVX512+).
259 : kRegRip = Reg::kRegIP, //!< Instruction pointer (EIP, RIP).
260 : kRegSeg = Reg::kRegCustom, //!< Segment register (None, ES, CS, SS, DS, FS, GS).
261 : kRegFp = Reg::kRegCustom + 1, //!< FPU (x87) register.
262 : kRegMm = Reg::kRegCustom + 2, //!< MMX register.
263 : kRegK = Reg::kRegCustom + 3, //!< K register (AVX512+).
264 : kRegBnd = Reg::kRegCustom + 4, //!< Bound register (BND).
265 : kRegCr = Reg::kRegCustom + 5, //!< Control register (CR).
266 : kRegDr = Reg::kRegCustom + 6, //!< Debug register (DR).
267 : kRegCount //!< Count of register types.
268 : };
269 :
270 : //! Register kind.
271 : ASMJIT_ENUM(Kind) {
272 : kKindGp = Reg::kKindGp, //!< GP register kind or none (universal).
273 : kKindVec = Reg::kKindVec, //!< XMM|YMM|ZMM register kind (universal).
274 : kKindMm = 2, //!< MMX register kind (legacy).
275 : kKindK = 3, //!< K register kind.
276 :
277 : // These are not managed by CodeCompiler nor used by Func-API:
278 : kKindFp = 4, //!< FPU (x87) register kind.
279 : kKindCr = 5, //!< Control register kind.
280 : kKindDr = 6, //!< Debug register kind.
281 : kKindBnd = 7, //!< Bound register kind.
282 : kKindSeg = 8, //!< Segment register kind.
283 : kKindRip = 9, //!< Instrucion pointer (IP).
284 : kKindCount //!< Count of all register kinds.
285 : };
286 :
287 : ASMJIT_DEFINE_ABSTRACT_REG(X86Reg, Reg)
288 :
289 : //! Get if the register is a GPB register (8-bit).
290 : ASMJIT_INLINE bool isGpb() const noexcept { return getSize() == 1; }
291 : //! Get if the register is RIP.
292 : ASMJIT_INLINE bool isRip() const noexcept { return hasSignature(signatureOf(kRegRip)); }
293 : //! Get if the register is a segment register.
294 : ASMJIT_INLINE bool isSeg() const noexcept { return hasSignature(signatureOf(kRegSeg)); }
295 : //! Get if the register is a low GPB register (8-bit).
296 : ASMJIT_INLINE bool isGpbLo() const noexcept { return hasSignature(signatureOf(kRegGpbLo)); }
297 : //! Get if the register is a high GPB register (8-bit).
298 : ASMJIT_INLINE bool isGpbHi() const noexcept { return hasSignature(signatureOf(kRegGpbHi)); }
299 : //! Get if the register is a GPW register (16-bit).
300 : ASMJIT_INLINE bool isGpw() const noexcept { return hasSignature(signatureOf(kRegGpw)); }
301 : //! Get if the register is a GPD register (32-bit).
302 : ASMJIT_INLINE bool isGpd() const noexcept { return hasSignature(signatureOf(kRegGpd)); }
303 : //! Get if the register is a GPQ register (64-bit).
304 : ASMJIT_INLINE bool isGpq() const noexcept { return hasSignature(signatureOf(kRegGpq)); }
305 : //! Get if the register is an FPU register (80-bit).
306 : ASMJIT_INLINE bool isFp() const noexcept { return hasSignature(signatureOf(kRegFp)); }
307 : //! Get if the register is an MMX register (64-bit).
308 : ASMJIT_INLINE bool isMm() const noexcept { return hasSignature(signatureOf(kRegMm)); }
309 : //! Get if the register is a K register (64-bit).
310 : ASMJIT_INLINE bool isK() const noexcept { return hasSignature(signatureOf(kRegK)); }
311 : //! Get if the register is an XMM register (128-bit).
312 : ASMJIT_INLINE bool isXmm() const noexcept { return hasSignature(signatureOf(kRegXmm)); }
313 : //! Get if the register is a YMM register (256-bit).
314 : ASMJIT_INLINE bool isYmm() const noexcept { return hasSignature(signatureOf(kRegYmm)); }
315 : //! Get if the register is a ZMM register (512-bit).
316 : ASMJIT_INLINE bool isZmm() const noexcept { return hasSignature(signatureOf(kRegZmm)); }
317 : //! Get if the register is a bound register.
318 : ASMJIT_INLINE bool isBnd() const noexcept { return hasSignature(signatureOf(kRegBnd)); }
319 : //! Get if the register is a control register.
320 : ASMJIT_INLINE bool isCr() const noexcept { return hasSignature(signatureOf(kRegCr)); }
321 : //! Get if the register is a debug register.
322 : ASMJIT_INLINE bool isDr() const noexcept { return hasSignature(signatureOf(kRegDr)); }
323 :
324 : template<uint32_t Type>
325 : ASMJIT_INLINE void setX86RegT(uint32_t rId) noexcept {
326 : setSignature(X86RegTraits<Type>::kSignature);
327 : setId(rId);
328 : }
329 :
330 : ASMJIT_INLINE void setTypeAndId(uint32_t rType, uint32_t rId) noexcept {
331 : ASMJIT_ASSERT(rType < kRegCount);
332 : setSignature(signatureOf(rType));
333 : setId(rId);
334 : }
335 :
336 : static ASMJIT_INLINE uint32_t kindOf(uint32_t rType) noexcept;
337 : template<uint32_t Type>
338 : static ASMJIT_INLINE uint32_t kindOfT() noexcept { return X86RegTraits<Type>::kKind; }
339 :
340 : static ASMJIT_INLINE uint32_t signatureOf(uint32_t rType) noexcept;
341 : template<uint32_t Type>
342 : static ASMJIT_INLINE uint32_t signatureOfT() noexcept { return X86RegTraits<Type>::kSignature; }
343 :
344 : static ASMJIT_INLINE uint32_t signatureOfVecByType(uint32_t typeId) noexcept {
345 : return typeId <= TypeId::_kVec128End ? signatureOfT<kRegXmm>() :
346 : typeId <= TypeId::_kVec256End ? signatureOfT<kRegYmm>() : signatureOfT<kRegZmm>() ;
347 : }
348 :
349 : static ASMJIT_INLINE uint32_t signatureOfVecBySize(uint32_t size) noexcept {
350 0 : return size <= 16 ? signatureOfT<kRegXmm>() :
351 0 : size <= 32 ? signatureOfT<kRegYmm>() : signatureOfT<kRegZmm>() ;
352 : }
353 :
354 : //! Get if the `op` operand is either a low or high 8-bit GPB register.
355 : static ASMJIT_INLINE bool isGpb(const Operand_& op) noexcept {
356 : // Check operand type, register kind, and size. Not interested in register type.
357 : const uint32_t kSgn = (Operand::kOpReg << kSignatureOpShift ) |
358 : (1 << kSignatureSizeShift) ;
359 0 : return (op.getSignature() & (kSignatureOpMask | kSignatureSizeMask)) == kSgn;
360 : }
361 :
362 : static ASMJIT_INLINE bool isRip(const Operand_& op) noexcept { return op.as<X86Reg>().isRip(); }
363 : static ASMJIT_INLINE bool isSeg(const Operand_& op) noexcept { return op.as<X86Reg>().isSeg(); }
364 : static ASMJIT_INLINE bool isGpbLo(const Operand_& op) noexcept { return op.as<X86Reg>().isGpbLo(); }
365 : static ASMJIT_INLINE bool isGpbHi(const Operand_& op) noexcept { return op.as<X86Reg>().isGpbHi(); }
366 : static ASMJIT_INLINE bool isGpw(const Operand_& op) noexcept { return op.as<X86Reg>().isGpw(); }
367 : static ASMJIT_INLINE bool isGpd(const Operand_& op) noexcept { return op.as<X86Reg>().isGpd(); }
368 : static ASMJIT_INLINE bool isGpq(const Operand_& op) noexcept { return op.as<X86Reg>().isGpq(); }
369 : static ASMJIT_INLINE bool isFp(const Operand_& op) noexcept { return op.as<X86Reg>().isFp(); }
370 : static ASMJIT_INLINE bool isMm(const Operand_& op) noexcept { return op.as<X86Reg>().isMm(); }
371 : static ASMJIT_INLINE bool isK(const Operand_& op) noexcept { return op.as<X86Reg>().isK(); }
372 : static ASMJIT_INLINE bool isXmm(const Operand_& op) noexcept { return op.as<X86Reg>().isXmm(); }
373 : static ASMJIT_INLINE bool isYmm(const Operand_& op) noexcept { return op.as<X86Reg>().isYmm(); }
374 : static ASMJIT_INLINE bool isZmm(const Operand_& op) noexcept { return op.as<X86Reg>().isZmm(); }
375 : static ASMJIT_INLINE bool isBnd(const Operand_& op) noexcept { return op.as<X86Reg>().isBnd(); }
376 : static ASMJIT_INLINE bool isCr(const Operand_& op) noexcept { return op.as<X86Reg>().isCr(); }
377 : static ASMJIT_INLINE bool isDr(const Operand_& op) noexcept { return op.as<X86Reg>().isDr(); }
378 :
379 : static ASMJIT_INLINE bool isGpb(const Operand_& op, uint32_t rId) noexcept { return isGpb(op) & (op.getId() == rId); }
380 :
381 : static ASMJIT_INLINE bool isRip(const Operand_& op, uint32_t rId) noexcept { return isRip(op) & (op.getId() == rId); }
382 : static ASMJIT_INLINE bool isSeg(const Operand_& op, uint32_t rId) noexcept { return isSeg(op) & (op.getId() == rId); }
383 : static ASMJIT_INLINE bool isGpbLo(const Operand_& op, uint32_t rId) noexcept { return isGpbLo(op) & (op.getId() == rId); }
384 : static ASMJIT_INLINE bool isGpbHi(const Operand_& op, uint32_t rId) noexcept { return isGpbHi(op) & (op.getId() == rId); }
385 0 : static ASMJIT_INLINE bool isGpw(const Operand_& op, uint32_t rId) noexcept { return isGpw(op) & (op.getId() == rId); }
386 : static ASMJIT_INLINE bool isGpd(const Operand_& op, uint32_t rId) noexcept { return isGpd(op) & (op.getId() == rId); }
387 : static ASMJIT_INLINE bool isGpq(const Operand_& op, uint32_t rId) noexcept { return isGpq(op) & (op.getId() == rId); }
388 : static ASMJIT_INLINE bool isFp(const Operand_& op, uint32_t rId) noexcept { return isFp(op) & (op.getId() == rId); }
389 : static ASMJIT_INLINE bool isMm(const Operand_& op, uint32_t rId) noexcept { return isMm(op) & (op.getId() == rId); }
390 : static ASMJIT_INLINE bool isK(const Operand_& op, uint32_t rId) noexcept { return isK(op) & (op.getId() == rId); }
391 0 : static ASMJIT_INLINE bool isXmm(const Operand_& op, uint32_t rId) noexcept { return isXmm(op) & (op.getId() == rId); }
392 : static ASMJIT_INLINE bool isYmm(const Operand_& op, uint32_t rId) noexcept { return isYmm(op) & (op.getId() == rId); }
393 : static ASMJIT_INLINE bool isZmm(const Operand_& op, uint32_t rId) noexcept { return isZmm(op) & (op.getId() == rId); }
394 : static ASMJIT_INLINE bool isBnd(const Operand_& op, uint32_t rId) noexcept { return isBnd(op) & (op.getId() == rId); }
395 : static ASMJIT_INLINE bool isCr(const Operand_& op, uint32_t rId) noexcept { return isCr(op) & (op.getId() == rId); }
396 : static ASMJIT_INLINE bool isDr(const Operand_& op, uint32_t rId) noexcept { return isDr(op) & (op.getId() == rId); }
397 :
398 : // --------------------------------------------------------------------------
399 : // [Memory Cast]
400 : // --------------------------------------------------------------------------
401 :
402 : // DEPRECATED in next-wip.
403 : ASMJIT_INLINE X86Mem m(int32_t disp = 0) const noexcept {
404 : return X86Mem(*this, disp, getSize(), Mem::kSignatureMemRegHomeFlag);
405 : }
406 :
407 : //! \overload
408 : ASMJIT_INLINE X86Mem m(const X86Reg& index, uint32_t shift = 0, int32_t disp = 0) const noexcept {
409 : return X86Mem(*this, index, shift, disp, getSize(), Mem::kSignatureMemRegHomeFlag);
410 : }
411 :
412 : //! Cast this variable to 8-bit memory operand.
413 : ASMJIT_INLINE X86Mem m8(int32_t disp = 0) const noexcept {
414 : return X86Mem(*this, disp, 1, Mem::kSignatureMemRegHomeFlag);
415 : }
416 :
417 : //! \overload
418 : ASMJIT_INLINE X86Mem m8(const X86Reg& index, uint32_t shift = 0, int32_t disp = 0) const noexcept {
419 : return X86Mem(*this, index, shift, disp, 1, Mem::kSignatureMemRegHomeFlag);
420 : }
421 :
422 : //! Cast this variable to 16-bit memory operand.
423 : ASMJIT_INLINE X86Mem m16(int32_t disp = 0) const noexcept {
424 : return X86Mem(*this, disp, 2, Mem::kSignatureMemRegHomeFlag);
425 : }
426 :
427 : //! \overload
428 : ASMJIT_INLINE X86Mem m16(const X86Reg& index, uint32_t shift = 0, int32_t disp = 0) const noexcept {
429 : return X86Mem(*this, index, shift, disp, 2, Mem::kSignatureMemRegHomeFlag);
430 : }
431 :
432 : //! Cast this variable to 32-bit memory operand.
433 : ASMJIT_INLINE X86Mem m32(int32_t disp = 0) const noexcept {
434 : return X86Mem(*this, disp, 4, Mem::kSignatureMemRegHomeFlag);
435 : }
436 :
437 : //! \overload
438 : ASMJIT_INLINE X86Mem m32(const X86Reg& index, uint32_t shift = 0, int32_t disp = 0) const noexcept {
439 : return X86Mem(*this, index, shift, disp, 4, Mem::kSignatureMemRegHomeFlag);
440 : }
441 :
442 : //! Cast this variable to 64-bit memory operand.
443 : ASMJIT_INLINE X86Mem m64(int32_t disp = 0) const noexcept {
444 : return X86Mem(*this, disp, 8, Mem::kSignatureMemRegHomeFlag);
445 : }
446 :
447 : //! \overload
448 : ASMJIT_INLINE X86Mem m64(const X86Reg& index, uint32_t shift = 0, int32_t disp = 0) const noexcept {
449 : return X86Mem(*this, index, shift, disp, 8, Mem::kSignatureMemRegHomeFlag);
450 : }
451 :
452 : //! Cast this variable to 80-bit memory operand (long double).
453 : ASMJIT_INLINE X86Mem m80(int32_t disp = 0) const noexcept {
454 : return X86Mem(*this, disp, 10, Mem::kSignatureMemRegHomeFlag);
455 : }
456 :
457 : //! \overload
458 : ASMJIT_INLINE X86Mem m80(const X86Reg& index, uint32_t shift = 0, int32_t disp = 0) const noexcept {
459 : return X86Mem(*this, index, shift, disp, 10, Mem::kSignatureMemRegHomeFlag);
460 : }
461 :
462 : //! Cast this variable to 128-bit memory operand.
463 : ASMJIT_INLINE X86Mem m128(int32_t disp = 0) const noexcept {
464 : return X86Mem(*this, disp, 16, Mem::kSignatureMemRegHomeFlag);
465 : }
466 :
467 : //! \overload
468 : ASMJIT_INLINE X86Mem m128(const X86Reg& index, uint32_t shift = 0, int32_t disp = 0) const noexcept {
469 : return X86Mem(*this, index, shift, disp, 16, Mem::kSignatureMemRegHomeFlag);
470 : }
471 :
472 : //! Cast this variable to 256-bit memory operand.
473 : ASMJIT_INLINE X86Mem m256(int32_t disp = 0) const noexcept {
474 : return X86Mem(*this, disp, 32, Mem::kSignatureMemRegHomeFlag);
475 : }
476 :
477 : //! \overload
478 : ASMJIT_INLINE X86Mem m256(const X86Reg& index, uint32_t shift = 0, int32_t disp = 0) const noexcept {
479 : return X86Mem(*this, index, shift, disp, 32, Mem::kSignatureMemRegHomeFlag);
480 : }
481 :
482 : //! Cast this variable to 256-bit memory operand.
483 : ASMJIT_INLINE X86Mem m512(int32_t disp = 0) const noexcept {
484 : return X86Mem(*this, disp, 64, Mem::kSignatureMemRegHomeFlag);
485 : }
486 :
487 : //! \overload
488 : ASMJIT_INLINE X86Mem m512(const X86Reg& index, uint32_t shift = 0, int32_t disp = 0) const noexcept {
489 : return X86Mem(*this, index, shift, disp, 64, Mem::kSignatureMemRegHomeFlag);
490 : };
491 : };
492 :
493 : ASMJIT_DEFINE_REG_TRAITS(X86RegTraits, X86Gp , X86Reg::kRegGpbLo, X86Reg::kKindGp , 1 , 16, TypeId::kI8 );
494 : ASMJIT_DEFINE_REG_TRAITS(X86RegTraits, X86Gp , X86Reg::kRegGpbHi, X86Reg::kKindGp , 1 , 4 , TypeId::kI8 );
495 : ASMJIT_DEFINE_REG_TRAITS(X86RegTraits, X86Gp , X86Reg::kRegGpw , X86Reg::kKindGp , 2 , 16, TypeId::kI16 );
496 : ASMJIT_DEFINE_REG_TRAITS(X86RegTraits, X86Gp , X86Reg::kRegGpd , X86Reg::kKindGp , 4 , 16, TypeId::kI32 );
497 : ASMJIT_DEFINE_REG_TRAITS(X86RegTraits, X86Gp , X86Reg::kRegGpq , X86Reg::kKindGp , 8 , 16, TypeId::kI64 );
498 : ASMJIT_DEFINE_REG_TRAITS(X86RegTraits, X86Xmm , X86Reg::kRegXmm , X86Reg::kKindVec, 16, 32, TypeId::kI32x4 );
499 : ASMJIT_DEFINE_REG_TRAITS(X86RegTraits, X86Ymm , X86Reg::kRegYmm , X86Reg::kKindVec, 32, 32, TypeId::kI32x8 );
500 : ASMJIT_DEFINE_REG_TRAITS(X86RegTraits, X86Zmm , X86Reg::kRegZmm , X86Reg::kKindVec, 64, 32, TypeId::kI32x16);
501 : ASMJIT_DEFINE_REG_TRAITS(X86RegTraits, X86Rip , X86Reg::kRegRip , X86Reg::kKindRip, 0 , 1 , TypeId::kVoid );
502 : ASMJIT_DEFINE_REG_TRAITS(X86RegTraits, X86Seg , X86Reg::kRegSeg , X86Reg::kKindSeg, 2 , 7 , TypeId::kVoid );
503 : ASMJIT_DEFINE_REG_TRAITS(X86RegTraits, X86Fp , X86Reg::kRegFp , X86Reg::kKindFp , 10, 8 , TypeId::kF80 );
504 : ASMJIT_DEFINE_REG_TRAITS(X86RegTraits, X86Mm , X86Reg::kRegMm , X86Reg::kKindMm , 8 , 8 , TypeId::kMmx64 );
505 : ASMJIT_DEFINE_REG_TRAITS(X86RegTraits, X86KReg, X86Reg::kRegK , X86Reg::kKindK , 0 , 8 , TypeId::kVoid );
506 : ASMJIT_DEFINE_REG_TRAITS(X86RegTraits, X86Bnd , X86Reg::kRegBnd , X86Reg::kKindBnd, 16, 4 , TypeId::kVoid );
507 : ASMJIT_DEFINE_REG_TRAITS(X86RegTraits, X86CReg, X86Reg::kRegCr , X86Reg::kKindCr , 0 , 16, TypeId::kVoid );
508 : ASMJIT_DEFINE_REG_TRAITS(X86RegTraits, X86DReg, X86Reg::kRegDr , X86Reg::kKindDr , 0 , 16, TypeId::kVoid );
509 :
510 : //! General purpose register (X86/X64).
511 : class X86Gp : public X86Reg {
512 : public:
513 1944 : ASMJIT_DEFINE_ABSTRACT_REG(X86Gp, X86Reg)
514 :
515 : //! X86/X64 physical id.
516 : //!
517 : //! NOTE: Register indexes have been reduced to only support general purpose
518 : //! registers. There is no need to have enumerations with number suffix that
519 : //! expands to the exactly same value as the suffix value itself.
520 : ASMJIT_ENUM(Id) {
521 : kIdAx = 0, //!< Physical id of AL|AH|AX|EAX|RAX registers.
522 : kIdCx = 1, //!< Physical id of CL|CH|CX|ECX|RCX registers.
523 : kIdDx = 2, //!< Physical id of DL|DH|DX|EDX|RDX registers.
524 : kIdBx = 3, //!< Physical id of BL|BH|BX|EBX|RBX registers.
525 : kIdSp = 4, //!< Physical id of SPL|SP|ESP|RSP registers.
526 : kIdBp = 5, //!< Physical id of BPL|BP|EBP|RBP registers.
527 : kIdSi = 6, //!< Physical id of SIL|SI|ESI|RSI registers.
528 : kIdDi = 7, //!< Physical id of DIL|DI|EDI|RDI registers.
529 : kIdR8 = 8, //!< Physical id of R8B|R8W|R8D|R8 registers (64-bit only).
530 : kIdR9 = 9, //!< Physical id of R9B|R9W|R9D|R9 registers (64-bit only).
531 : kIdR10 = 10, //!< Physical id of R10B|R10W|R10D|R10 registers (64-bit only).
532 : kIdR11 = 11, //!< Physical id of R11B|R11W|R11D|R11 registers (64-bit only).
533 : kIdR12 = 12, //!< Physical id of R12B|R12W|R12D|R12 registers (64-bit only).
534 : kIdR13 = 13, //!< Physical id of R13B|R13W|R13D|R13 registers (64-bit only).
535 : kIdR14 = 14, //!< Physical id of R14B|R14W|R14D|R14 registers (64-bit only).
536 : kIdR15 = 15 //!< Physical id of R15B|R15W|R15D|R15 registers (64-bit only).
537 : };
538 :
539 : //! Cast this register to 8-bit (LO) part.
540 : ASMJIT_INLINE X86GpbLo r8() const noexcept;
541 : //! Cast this register to 8-bit (LO) part.
542 : ASMJIT_INLINE X86GpbLo r8Lo() const noexcept;
543 : //! Cast this register to 8-bit (HI) part.
544 : ASMJIT_INLINE X86GpbHi r8Hi() const noexcept;
545 : //! Cast this register to 16-bit.
546 : ASMJIT_INLINE X86Gpw r16() const noexcept;
547 : //! Cast this register to 32-bit.
548 : ASMJIT_INLINE X86Gpd r32() const noexcept;
549 : //! Cast this register to 64-bit.
550 : ASMJIT_INLINE X86Gpq r64() const noexcept;
551 : };
552 :
553 : //! XMM|YMM|ZMM register (X86/X64).
554 : class X86Vec : public X86Reg {
555 : ASMJIT_DEFINE_ABSTRACT_REG(X86Vec, X86Reg)
556 :
557 : //! Cast this register to XMM (clone).
558 : ASMJIT_INLINE X86Xmm xmm() const noexcept;
559 : //! Cast this register to YMM.
560 : ASMJIT_INLINE X86Ymm ymm() const noexcept;
561 : //! Cast this register to ZMM.
562 : ASMJIT_INLINE X86Zmm zmm() const noexcept;
563 : };
564 :
565 : //! Segment register (X86/X64).
566 : class X86Seg : public X86Reg {
567 : ASMJIT_DEFINE_FINAL_REG(X86Seg, X86Reg, X86RegTraits<kRegSeg>)
568 :
569 : //! X86/X64 segment id.
570 : ASMJIT_ENUM(Id) {
571 : kIdNone = 0, //!< No segment (default).
572 : kIdEs = 1, //!< ES segment.
573 : kIdCs = 2, //!< CS segment.
574 : kIdSs = 3, //!< SS segment.
575 : kIdDs = 4, //!< DS segment.
576 : kIdFs = 5, //!< FS segment.
577 : kIdGs = 6, //!< GS segment.
578 :
579 : //! Count of X86 segment registers supported by AsmJit.
580 : //!
581 : //! NOTE: X86 architecture has 6 segment registers - ES, CS, SS, DS, FS, GS.
582 : //! X64 architecture lowers them down to just FS and GS. AsmJit supports 7
583 : //! segment registers - all addressable in both X86 and X64 modes and one
584 : //! extra called `X86Seg::kIdNone`, which is AsmJit specific and means that
585 : //! there is no segment register specified.
586 : kIdCount = 7
587 : };
588 : };
589 :
590 : //! GPB (low or high) register (X86/X64).
591 : class X86Gpb : public X86Gp { ASMJIT_DEFINE_ABSTRACT_REG(X86Gpb, X86Gp) };
592 : //! GPB low register (X86/X64).
593 : class X86GpbLo : public X86Gpb { ASMJIT_DEFINE_FINAL_REG(X86GpbLo, X86Gpb, X86RegTraits<kRegGpbLo>) };
594 : //! GPB high register (X86/X64).
595 : class X86GpbHi : public X86Gpb { ASMJIT_DEFINE_FINAL_REG(X86GpbHi, X86Gpb, X86RegTraits<kRegGpbHi>) };
596 : //! GPW register (X86/X64).
597 : class X86Gpw : public X86Gp { ASMJIT_DEFINE_FINAL_REG(X86Gpw, X86Gp, X86RegTraits<kRegGpw>) };
598 : //! GPD register (X86/X64).
599 : class X86Gpd : public X86Gp { ASMJIT_DEFINE_FINAL_REG(X86Gpd, X86Gp, X86RegTraits<kRegGpd>) };
600 : //! GPQ register (X64).
601 : class X86Gpq : public X86Gp { ASMJIT_DEFINE_FINAL_REG(X86Gpq, X86Gp, X86RegTraits<kRegGpq>) };
602 :
603 : //! RIP register (X86/X64).
604 : class X86Rip : public X86Reg { ASMJIT_DEFINE_FINAL_REG(X86Rip, X86Reg, X86RegTraits<kRegRip>) };
605 : //! 80-bit FPU register (X86/X64).
606 : class X86Fp : public X86Reg { ASMJIT_DEFINE_FINAL_REG(X86Fp, X86Reg, X86RegTraits<kRegFp>) };
607 : //! 64-bit MMX register (MMX+).
608 : class X86Mm : public X86Reg { ASMJIT_DEFINE_FINAL_REG(X86Mm, X86Reg, X86RegTraits<kRegMm>) };
609 : //! 64-bit K register (AVX512+).
610 : class X86KReg : public X86Reg { ASMJIT_DEFINE_FINAL_REG(X86KReg, X86Reg, X86RegTraits<kRegK>) };
611 : //! 128-bit XMM register (SSE+).
612 16492 : class X86Xmm : public X86Vec { ASMJIT_DEFINE_FINAL_REG(X86Xmm, X86Vec, X86RegTraits<kRegXmm>) };
613 : //! 256-bit YMM register (AVX+).
614 : class X86Ymm : public X86Vec { ASMJIT_DEFINE_FINAL_REG(X86Ymm, X86Vec, X86RegTraits<kRegYmm>) };
615 : //! 512-bit ZMM register (AVX512+).
616 : class X86Zmm : public X86Vec { ASMJIT_DEFINE_FINAL_REG(X86Zmm, X86Vec, X86RegTraits<kRegZmm>) };
617 : //! 128-bit BND register (BND+).
618 : class X86Bnd : public X86Reg { ASMJIT_DEFINE_FINAL_REG(X86Bnd, X86Reg, X86RegTraits<kRegBnd>) };
619 : //! 32-bit or 64-bit control register (X86/X64).
620 : class X86CReg : public X86Reg { ASMJIT_DEFINE_FINAL_REG(X86CReg, X86Reg, X86RegTraits<kRegCr>) };
621 : //! 32-bit or 64-bit debug register (X86/X64).
622 : class X86DReg : public X86Reg { ASMJIT_DEFINE_FINAL_REG(X86DReg, X86Reg, X86RegTraits<kRegDr>) };
623 :
624 : ASMJIT_INLINE X86GpbLo X86Gp::r8() const noexcept { return X86GpbLo(getId()); }
625 : ASMJIT_INLINE X86GpbLo X86Gp::r8Lo() const noexcept { return X86GpbLo(getId()); }
626 : ASMJIT_INLINE X86GpbHi X86Gp::r8Hi() const noexcept { return X86GpbHi(getId()); }
627 : ASMJIT_INLINE X86Gpw X86Gp::r16() const noexcept { return X86Gpw(getId()); }
628 : ASMJIT_INLINE X86Gpd X86Gp::r32() const noexcept { return X86Gpd(getId()); }
629 : ASMJIT_INLINE X86Gpq X86Gp::r64() const noexcept { return X86Gpq(getId()); }
630 : ASMJIT_INLINE X86Xmm X86Vec::xmm() const noexcept { return X86Xmm(*this, getId()); }
631 : ASMJIT_INLINE X86Ymm X86Vec::ymm() const noexcept { return X86Ymm(*this, getId()); }
632 : ASMJIT_INLINE X86Zmm X86Vec::zmm() const noexcept { return X86Zmm(*this, getId()); }
633 :
634 : ASMJIT_INLINE X86Seg X86Mem::getSegment() const noexcept { return X86Seg(getSegmentId()); }
635 : ASMJIT_INLINE void X86Mem::setSegment(const X86Seg& seg) noexcept { setSegmentId(seg.getId()); }
636 :
637 :
638 : ASMJIT_DEFINE_TYPE_ID(X86Gpb, TypeId::kI8);
639 : ASMJIT_DEFINE_TYPE_ID(X86Gpw, TypeId::kI16);
640 : ASMJIT_DEFINE_TYPE_ID(X86Gpd, TypeId::kI32);
641 : ASMJIT_DEFINE_TYPE_ID(X86Gpq, TypeId::kI64);
642 : ASMJIT_DEFINE_TYPE_ID(X86Mm , TypeId::kMmx64);
643 : ASMJIT_DEFINE_TYPE_ID(X86Xmm, TypeId::kI32x4);
644 : ASMJIT_DEFINE_TYPE_ID(X86Ymm, TypeId::kI32x8);
645 : ASMJIT_DEFINE_TYPE_ID(X86Zmm, TypeId::kI32x16);
646 :
647 : // ============================================================================
648 : // [asmjit::X86OpData]
649 : // ============================================================================
650 :
651 : struct X86OpData {
652 : // --------------------------------------------------------------------------
653 : // [Signatures]
654 : // --------------------------------------------------------------------------
655 :
656 : //! Information about all architecture registers.
657 : ArchRegs archRegs;
658 :
659 : // --------------------------------------------------------------------------
660 : // [Operands]
661 : // --------------------------------------------------------------------------
662 :
663 : // Prevent calling constructors of these registers when exporting.
664 : #if defined(ASMJIT_EXPORTS_X86_OPERAND)
665 : # define ASMJIT_X86_REG_DATA(REG) Operand_
666 : #else
667 : # define ASMJIT_X86_REG_DATA(REG) REG
668 : #endif
669 : ASMJIT_X86_REG_DATA(X86Rip ) rip[1];
670 : ASMJIT_X86_REG_DATA(X86Seg ) seg[7];
671 : ASMJIT_X86_REG_DATA(X86Gp ) gpbLo[16];
672 : ASMJIT_X86_REG_DATA(X86Gp ) gpbHi[4];
673 : ASMJIT_X86_REG_DATA(X86Gp ) gpw[16];
674 : ASMJIT_X86_REG_DATA(X86Gp ) gpd[16];
675 : ASMJIT_X86_REG_DATA(X86Gp ) gpq[16];
676 : ASMJIT_X86_REG_DATA(X86Fp ) fp[8];
677 : ASMJIT_X86_REG_DATA(X86Mm ) mm[8];
678 : ASMJIT_X86_REG_DATA(X86KReg) k[8];
679 : ASMJIT_X86_REG_DATA(X86Xmm ) xmm[32];
680 : ASMJIT_X86_REG_DATA(X86Ymm ) ymm[32];
681 : ASMJIT_X86_REG_DATA(X86Zmm ) zmm[32];
682 : ASMJIT_X86_REG_DATA(X86Bnd ) bnd[4];
683 : ASMJIT_X86_REG_DATA(X86CReg) cr[16];
684 : ASMJIT_X86_REG_DATA(X86DReg) dr[16];
685 : #undef ASMJIT_X86_REG_DATA
686 : };
687 : ASMJIT_VARAPI const X86OpData x86OpData;
688 :
689 : // ... X86Reg methods that require `x86OpData`.
690 : ASMJIT_INLINE uint32_t X86Reg::signatureOf(uint32_t rType) noexcept {
691 : ASMJIT_ASSERT(rType <= Reg::kRegMax);
692 : return x86OpData.archRegs.regInfo[rType].getSignature();
693 : }
694 :
695 : ASMJIT_INLINE uint32_t X86Reg::kindOf(uint32_t rType) noexcept {
696 : ASMJIT_ASSERT(rType <= Reg::kRegMax);
697 : return x86OpData.archRegs.regInfo[rType].getKind();
698 : }
699 :
700 : // ============================================================================
701 : // [asmjit::x86]
702 : // ============================================================================
703 :
704 : namespace x86 {
705 :
706 : // ============================================================================
707 : // [asmjit::x86 - Reg]
708 : // ============================================================================
709 :
710 : #if !defined(ASMJIT_EXPORTS_X86_OPERAND)
711 : namespace {
712 : #define ASMJIT_X86_PHYS_REG(TYPE, NAME, PROPERTY) \
713 : static const TYPE& NAME = x86OpData.PROPERTY
714 :
715 : ASMJIT_X86_PHYS_REG(X86Rip , rip , rip[0]); //!< RIP register.
716 : ASMJIT_X86_PHYS_REG(X86Seg , es , seg[1]); //!< CS segment register.
717 : ASMJIT_X86_PHYS_REG(X86Seg , cs , seg[2]); //!< SS segment register.
718 : ASMJIT_X86_PHYS_REG(X86Seg , ss , seg[3]); //!< DS segment register.
719 : ASMJIT_X86_PHYS_REG(X86Seg , ds , seg[4]); //!< ES segment register.
720 : ASMJIT_X86_PHYS_REG(X86Seg , fs , seg[5]); //!< FS segment register.
721 : ASMJIT_X86_PHYS_REG(X86Seg , gs , seg[6]); //!< GS segment register.
722 :
723 : ASMJIT_X86_PHYS_REG(X86Gp , al , gpbLo[0]); //!< 8-bit low GPB register.
724 : ASMJIT_X86_PHYS_REG(X86Gp , cl , gpbLo[1]); //!< 8-bit low GPB register.
725 : ASMJIT_X86_PHYS_REG(X86Gp , dl , gpbLo[2]); //!< 8-bit low GPB register.
726 : ASMJIT_X86_PHYS_REG(X86Gp , bl , gpbLo[3]); //!< 8-bit low GPB register.
727 : ASMJIT_X86_PHYS_REG(X86Gp , spl , gpbLo[4]); //!< 8-bit low GPB register (X64).
728 : ASMJIT_X86_PHYS_REG(X86Gp , bpl , gpbLo[5]); //!< 8-bit low GPB register (X64).
729 : ASMJIT_X86_PHYS_REG(X86Gp , sil , gpbLo[6]); //!< 8-bit low GPB register (X64).
730 : ASMJIT_X86_PHYS_REG(X86Gp , dil , gpbLo[7]); //!< 8-bit low GPB register (X64).
731 : ASMJIT_X86_PHYS_REG(X86Gp , r8b , gpbLo[8]); //!< 8-bit low GPB register (X64).
732 : ASMJIT_X86_PHYS_REG(X86Gp , r9b , gpbLo[9]); //!< 8-bit low GPB register (X64).
733 : ASMJIT_X86_PHYS_REG(X86Gp , r10b , gpbLo[10]); //!< 8-bit low GPB register (X64).
734 : ASMJIT_X86_PHYS_REG(X86Gp , r11b , gpbLo[11]); //!< 8-bit low GPB register (X64).
735 : ASMJIT_X86_PHYS_REG(X86Gp , r12b , gpbLo[12]); //!< 8-bit low GPB register (X64).
736 : ASMJIT_X86_PHYS_REG(X86Gp , r13b , gpbLo[13]); //!< 8-bit low GPB register (X64).
737 : ASMJIT_X86_PHYS_REG(X86Gp , r14b , gpbLo[14]); //!< 8-bit low GPB register (X64).
738 : ASMJIT_X86_PHYS_REG(X86Gp , r15b , gpbLo[15]); //!< 8-bit low GPB register (X64).
739 :
740 : ASMJIT_X86_PHYS_REG(X86Gp , ah , gpbHi[0]); //!< 8-bit high GPB register.
741 : ASMJIT_X86_PHYS_REG(X86Gp , ch , gpbHi[1]); //!< 8-bit high GPB register.
742 : ASMJIT_X86_PHYS_REG(X86Gp , dh , gpbHi[2]); //!< 8-bit high GPB register.
743 : ASMJIT_X86_PHYS_REG(X86Gp , bh , gpbHi[3]); //!< 8-bit high GPB register.
744 :
745 : ASMJIT_X86_PHYS_REG(X86Gp , ax , gpw[0]); //!< 16-bit GPW register.
746 : ASMJIT_X86_PHYS_REG(X86Gp , cx , gpw[1]); //!< 16-bit GPW register.
747 : ASMJIT_X86_PHYS_REG(X86Gp , dx , gpw[2]); //!< 16-bit GPW register.
748 : ASMJIT_X86_PHYS_REG(X86Gp , bx , gpw[3]); //!< 16-bit GPW register.
749 : ASMJIT_X86_PHYS_REG(X86Gp , sp , gpw[4]); //!< 16-bit GPW register.
750 : ASMJIT_X86_PHYS_REG(X86Gp , bp , gpw[5]); //!< 16-bit GPW register.
751 : ASMJIT_X86_PHYS_REG(X86Gp , si , gpw[6]); //!< 16-bit GPW register.
752 : ASMJIT_X86_PHYS_REG(X86Gp , di , gpw[7]); //!< 16-bit GPW register.
753 : ASMJIT_X86_PHYS_REG(X86Gp , r8w , gpw[8]); //!< 16-bit GPW register (X64).
754 : ASMJIT_X86_PHYS_REG(X86Gp , r9w , gpw[9]); //!< 16-bit GPW register (X64).
755 : ASMJIT_X86_PHYS_REG(X86Gp , r10w , gpw[10]); //!< 16-bit GPW register (X64).
756 : ASMJIT_X86_PHYS_REG(X86Gp , r11w , gpw[11]); //!< 16-bit GPW register (X64).
757 : ASMJIT_X86_PHYS_REG(X86Gp , r12w , gpw[12]); //!< 16-bit GPW register (X64).
758 : ASMJIT_X86_PHYS_REG(X86Gp , r13w , gpw[13]); //!< 16-bit GPW register (X64).
759 : ASMJIT_X86_PHYS_REG(X86Gp , r14w , gpw[14]); //!< 16-bit GPW register (X64).
760 : ASMJIT_X86_PHYS_REG(X86Gp , r15w , gpw[15]); //!< 16-bit GPW register (X64).
761 :
762 : ASMJIT_X86_PHYS_REG(X86Gp , eax , gpd[0]); //!< 32-bit GPD register.
763 : ASMJIT_X86_PHYS_REG(X86Gp , ecx , gpd[1]); //!< 32-bit GPD register.
764 : ASMJIT_X86_PHYS_REG(X86Gp , edx , gpd[2]); //!< 32-bit GPD register.
765 : ASMJIT_X86_PHYS_REG(X86Gp , ebx , gpd[3]); //!< 32-bit GPD register.
766 : ASMJIT_X86_PHYS_REG(X86Gp , esp , gpd[4]); //!< 32-bit GPD register.
767 : ASMJIT_X86_PHYS_REG(X86Gp , ebp , gpd[5]); //!< 32-bit GPD register.
768 : ASMJIT_X86_PHYS_REG(X86Gp , esi , gpd[6]); //!< 32-bit GPD register.
769 : ASMJIT_X86_PHYS_REG(X86Gp , edi , gpd[7]); //!< 32-bit GPD register.
770 : ASMJIT_X86_PHYS_REG(X86Gp , r8d , gpd[8]); //!< 32-bit GPD register (X64).
771 : ASMJIT_X86_PHYS_REG(X86Gp , r9d , gpd[9]); //!< 32-bit GPD register (X64).
772 : ASMJIT_X86_PHYS_REG(X86Gp , r10d , gpd[10]); //!< 32-bit GPD register (X64).
773 : ASMJIT_X86_PHYS_REG(X86Gp , r11d , gpd[11]); //!< 32-bit GPD register (X64).
774 : ASMJIT_X86_PHYS_REG(X86Gp , r12d , gpd[12]); //!< 32-bit GPD register (X64).
775 : ASMJIT_X86_PHYS_REG(X86Gp , r13d , gpd[13]); //!< 32-bit GPD register (X64).
776 : ASMJIT_X86_PHYS_REG(X86Gp , r14d , gpd[14]); //!< 32-bit GPD register (X64).
777 : ASMJIT_X86_PHYS_REG(X86Gp , r15d , gpd[15]); //!< 32-bit GPD register (X64).
778 :
779 : ASMJIT_X86_PHYS_REG(X86Gp , rax , gpq[0]); //!< 64-bit GPQ register (X64).
780 : ASMJIT_X86_PHYS_REG(X86Gp , rcx , gpq[1]); //!< 64-bit GPQ register (X64).
781 : ASMJIT_X86_PHYS_REG(X86Gp , rdx , gpq[2]); //!< 64-bit GPQ register (X64).
782 : ASMJIT_X86_PHYS_REG(X86Gp , rbx , gpq[3]); //!< 64-bit GPQ register (X64).
783 : ASMJIT_X86_PHYS_REG(X86Gp , rsp , gpq[4]); //!< 64-bit GPQ register (X64).
784 : ASMJIT_X86_PHYS_REG(X86Gp , rbp , gpq[5]); //!< 64-bit GPQ register (X64).
785 : ASMJIT_X86_PHYS_REG(X86Gp , rsi , gpq[6]); //!< 64-bit GPQ register (X64).
786 : ASMJIT_X86_PHYS_REG(X86Gp , rdi , gpq[7]); //!< 64-bit GPQ register (X64).
787 : ASMJIT_X86_PHYS_REG(X86Gp , r8 , gpq[8]); //!< 64-bit GPQ register (X64).
788 : ASMJIT_X86_PHYS_REG(X86Gp , r9 , gpq[9]); //!< 64-bit GPQ register (X64).
789 : ASMJIT_X86_PHYS_REG(X86Gp , r10 , gpq[10]); //!< 64-bit GPQ register (X64).
790 : ASMJIT_X86_PHYS_REG(X86Gp , r11 , gpq[11]); //!< 64-bit GPQ register (X64).
791 : ASMJIT_X86_PHYS_REG(X86Gp , r12 , gpq[12]); //!< 64-bit GPQ register (X64).
792 : ASMJIT_X86_PHYS_REG(X86Gp , r13 , gpq[13]); //!< 64-bit GPQ register (X64).
793 : ASMJIT_X86_PHYS_REG(X86Gp , r14 , gpq[14]); //!< 64-bit GPQ register (X64).
794 : ASMJIT_X86_PHYS_REG(X86Gp , r15 , gpq[15]); //!< 64-bit GPQ register (X64).
795 :
796 : ASMJIT_X86_PHYS_REG(X86Fp , fp0 , fp[0]); //!< 80-bit FPU register.
797 : ASMJIT_X86_PHYS_REG(X86Fp , fp1 , fp[1]); //!< 80-bit FPU register.
798 : ASMJIT_X86_PHYS_REG(X86Fp , fp2 , fp[2]); //!< 80-bit FPU register.
799 : ASMJIT_X86_PHYS_REG(X86Fp , fp3 , fp[3]); //!< 80-bit FPU register.
800 : ASMJIT_X86_PHYS_REG(X86Fp , fp4 , fp[4]); //!< 80-bit FPU register.
801 : ASMJIT_X86_PHYS_REG(X86Fp , fp5 , fp[5]); //!< 80-bit FPU register.
802 : ASMJIT_X86_PHYS_REG(X86Fp , fp6 , fp[6]); //!< 80-bit FPU register.
803 : ASMJIT_X86_PHYS_REG(X86Fp , fp7 , fp[7]); //!< 80-bit FPU register.
804 :
805 : ASMJIT_X86_PHYS_REG(X86Mm , mm0 , mm[0]); //!< 64-bit MMX register.
806 : ASMJIT_X86_PHYS_REG(X86Mm , mm1 , mm[1]); //!< 64-bit MMX register.
807 : ASMJIT_X86_PHYS_REG(X86Mm , mm2 , mm[2]); //!< 64-bit MMX register.
808 : ASMJIT_X86_PHYS_REG(X86Mm , mm3 , mm[3]); //!< 64-bit MMX register.
809 : ASMJIT_X86_PHYS_REG(X86Mm , mm4 , mm[4]); //!< 64-bit MMX register.
810 : ASMJIT_X86_PHYS_REG(X86Mm , mm5 , mm[5]); //!< 64-bit MMX register.
811 : ASMJIT_X86_PHYS_REG(X86Mm , mm6 , mm[6]); //!< 64-bit MMX register.
812 : ASMJIT_X86_PHYS_REG(X86Mm , mm7 , mm[7]); //!< 64-bit MMX register.
813 :
814 : ASMJIT_X86_PHYS_REG(X86KReg, k0 , k[0]); //!< 64-bit K register.
815 : ASMJIT_X86_PHYS_REG(X86KReg, k1 , k[1]); //!< 64-bit K register.
816 : ASMJIT_X86_PHYS_REG(X86KReg, k2 , k[2]); //!< 64-bit K register.
817 : ASMJIT_X86_PHYS_REG(X86KReg, k3 , k[3]); //!< 64-bit K register.
818 : ASMJIT_X86_PHYS_REG(X86KReg, k4 , k[4]); //!< 64-bit K register.
819 : ASMJIT_X86_PHYS_REG(X86KReg, k5 , k[5]); //!< 64-bit K register.
820 : ASMJIT_X86_PHYS_REG(X86KReg, k6 , k[6]); //!< 64-bit K register.
821 : ASMJIT_X86_PHYS_REG(X86KReg, k7 , k[7]); //!< 64-bit K register.
822 :
823 : ASMJIT_X86_PHYS_REG(X86Xmm , xmm0 , xmm[0]); //!< 128-bit XMM register.
824 : ASMJIT_X86_PHYS_REG(X86Xmm , xmm1 , xmm[1]); //!< 128-bit XMM register.
825 : ASMJIT_X86_PHYS_REG(X86Xmm , xmm2 , xmm[2]); //!< 128-bit XMM register.
826 : ASMJIT_X86_PHYS_REG(X86Xmm , xmm3 , xmm[3]); //!< 128-bit XMM register.
827 : ASMJIT_X86_PHYS_REG(X86Xmm , xmm4 , xmm[4]); //!< 128-bit XMM register.
828 : ASMJIT_X86_PHYS_REG(X86Xmm , xmm5 , xmm[5]); //!< 128-bit XMM register.
829 : ASMJIT_X86_PHYS_REG(X86Xmm , xmm6 , xmm[6]); //!< 128-bit XMM register.
830 : ASMJIT_X86_PHYS_REG(X86Xmm , xmm7 , xmm[7]); //!< 128-bit XMM register.
831 : ASMJIT_X86_PHYS_REG(X86Xmm , xmm8 , xmm[8]); //!< 128-bit XMM register (X64).
832 : ASMJIT_X86_PHYS_REG(X86Xmm , xmm9 , xmm[9]); //!< 128-bit XMM register (X64).
833 : ASMJIT_X86_PHYS_REG(X86Xmm , xmm10, xmm[10]); //!< 128-bit XMM register (X64).
834 : ASMJIT_X86_PHYS_REG(X86Xmm , xmm11, xmm[11]); //!< 128-bit XMM register (X64).
835 : ASMJIT_X86_PHYS_REG(X86Xmm , xmm12, xmm[12]); //!< 128-bit XMM register (X64).
836 : ASMJIT_X86_PHYS_REG(X86Xmm , xmm13, xmm[13]); //!< 128-bit XMM register (X64).
837 : ASMJIT_X86_PHYS_REG(X86Xmm , xmm14, xmm[14]); //!< 128-bit XMM register (X64).
838 : ASMJIT_X86_PHYS_REG(X86Xmm , xmm15, xmm[15]); //!< 128-bit XMM register (X64).
839 : ASMJIT_X86_PHYS_REG(X86Xmm , xmm16, xmm[16]); //!< 128-bit XMM register (X64 & AVX512_VL+).
840 : ASMJIT_X86_PHYS_REG(X86Xmm , xmm17, xmm[17]); //!< 128-bit XMM register (X64 & AVX512_VL+).
841 : ASMJIT_X86_PHYS_REG(X86Xmm , xmm18, xmm[18]); //!< 128-bit XMM register (X64 & AVX512_VL+).
842 : ASMJIT_X86_PHYS_REG(X86Xmm , xmm19, xmm[19]); //!< 128-bit XMM register (X64 & AVX512_VL+).
843 : ASMJIT_X86_PHYS_REG(X86Xmm , xmm20, xmm[20]); //!< 128-bit XMM register (X64 & AVX512_VL+).
844 : ASMJIT_X86_PHYS_REG(X86Xmm , xmm21, xmm[21]); //!< 128-bit XMM register (X64 & AVX512_VL+).
845 : ASMJIT_X86_PHYS_REG(X86Xmm , xmm22, xmm[22]); //!< 128-bit XMM register (X64 & AVX512_VL+).
846 : ASMJIT_X86_PHYS_REG(X86Xmm , xmm23, xmm[23]); //!< 128-bit XMM register (X64 & AVX512_VL+).
847 : ASMJIT_X86_PHYS_REG(X86Xmm , xmm24, xmm[24]); //!< 128-bit XMM register (X64 & AVX512_VL+).
848 : ASMJIT_X86_PHYS_REG(X86Xmm , xmm25, xmm[25]); //!< 128-bit XMM register (X64 & AVX512_VL+).
849 : ASMJIT_X86_PHYS_REG(X86Xmm , xmm26, xmm[26]); //!< 128-bit XMM register (X64 & AVX512_VL+).
850 : ASMJIT_X86_PHYS_REG(X86Xmm , xmm27, xmm[27]); //!< 128-bit XMM register (X64 & AVX512_VL+).
851 : ASMJIT_X86_PHYS_REG(X86Xmm , xmm28, xmm[28]); //!< 128-bit XMM register (X64 & AVX512_VL+).
852 : ASMJIT_X86_PHYS_REG(X86Xmm , xmm29, xmm[29]); //!< 128-bit XMM register (X64 & AVX512_VL+).
853 : ASMJIT_X86_PHYS_REG(X86Xmm , xmm30, xmm[30]); //!< 128-bit XMM register (X64 & AVX512_VL+).
854 : ASMJIT_X86_PHYS_REG(X86Xmm , xmm31, xmm[31]); //!< 128-bit XMM register (X64 & AVX512_VL+).
855 :
856 : ASMJIT_X86_PHYS_REG(X86Ymm , ymm0 , ymm[0]); //!< 256-bit YMM register.
857 : ASMJIT_X86_PHYS_REG(X86Ymm , ymm1 , ymm[1]); //!< 256-bit YMM register.
858 : ASMJIT_X86_PHYS_REG(X86Ymm , ymm2 , ymm[2]); //!< 256-bit YMM register.
859 : ASMJIT_X86_PHYS_REG(X86Ymm , ymm3 , ymm[3]); //!< 256-bit YMM register.
860 : ASMJIT_X86_PHYS_REG(X86Ymm , ymm4 , ymm[4]); //!< 256-bit YMM register.
861 : ASMJIT_X86_PHYS_REG(X86Ymm , ymm5 , ymm[5]); //!< 256-bit YMM register.
862 : ASMJIT_X86_PHYS_REG(X86Ymm , ymm6 , ymm[6]); //!< 256-bit YMM register.
863 : ASMJIT_X86_PHYS_REG(X86Ymm , ymm7 , ymm[7]); //!< 256-bit YMM register.
864 : ASMJIT_X86_PHYS_REG(X86Ymm , ymm8 , ymm[8]); //!< 256-bit YMM register (X64).
865 : ASMJIT_X86_PHYS_REG(X86Ymm , ymm9 , ymm[9]); //!< 256-bit YMM register (X64).
866 : ASMJIT_X86_PHYS_REG(X86Ymm , ymm10, ymm[10]); //!< 256-bit YMM register (X64).
867 : ASMJIT_X86_PHYS_REG(X86Ymm , ymm11, ymm[11]); //!< 256-bit YMM register (X64).
868 : ASMJIT_X86_PHYS_REG(X86Ymm , ymm12, ymm[12]); //!< 256-bit YMM register (X64).
869 : ASMJIT_X86_PHYS_REG(X86Ymm , ymm13, ymm[13]); //!< 256-bit YMM register (X64).
870 : ASMJIT_X86_PHYS_REG(X86Ymm , ymm14, ymm[14]); //!< 256-bit YMM register (X64).
871 : ASMJIT_X86_PHYS_REG(X86Ymm , ymm15, ymm[15]); //!< 256-bit YMM register (X64).
872 : ASMJIT_X86_PHYS_REG(X86Ymm , ymm16, ymm[16]); //!< 256-bit YMM register (X64 & AVX512_VL+).
873 : ASMJIT_X86_PHYS_REG(X86Ymm , ymm17, ymm[17]); //!< 256-bit YMM register (X64 & AVX512_VL+).
874 : ASMJIT_X86_PHYS_REG(X86Ymm , ymm18, ymm[18]); //!< 256-bit YMM register (X64 & AVX512_VL+).
875 : ASMJIT_X86_PHYS_REG(X86Ymm , ymm19, ymm[19]); //!< 256-bit YMM register (X64 & AVX512_VL+).
876 : ASMJIT_X86_PHYS_REG(X86Ymm , ymm20, ymm[20]); //!< 256-bit YMM register (X64 & AVX512_VL+).
877 : ASMJIT_X86_PHYS_REG(X86Ymm , ymm21, ymm[21]); //!< 256-bit YMM register (X64 & AVX512_VL+).
878 : ASMJIT_X86_PHYS_REG(X86Ymm , ymm22, ymm[22]); //!< 256-bit YMM register (X64 & AVX512_VL+).
879 : ASMJIT_X86_PHYS_REG(X86Ymm , ymm23, ymm[23]); //!< 256-bit YMM register (X64 & AVX512_VL+).
880 : ASMJIT_X86_PHYS_REG(X86Ymm , ymm24, ymm[24]); //!< 256-bit YMM register (X64 & AVX512_VL+).
881 : ASMJIT_X86_PHYS_REG(X86Ymm , ymm25, ymm[25]); //!< 256-bit YMM register (X64 & AVX512_VL+).
882 : ASMJIT_X86_PHYS_REG(X86Ymm , ymm26, ymm[26]); //!< 256-bit YMM register (X64 & AVX512_VL+).
883 : ASMJIT_X86_PHYS_REG(X86Ymm , ymm27, ymm[27]); //!< 256-bit YMM register (X64 & AVX512_VL+).
884 : ASMJIT_X86_PHYS_REG(X86Ymm , ymm28, ymm[28]); //!< 256-bit YMM register (X64 & AVX512_VL+).
885 : ASMJIT_X86_PHYS_REG(X86Ymm , ymm29, ymm[29]); //!< 256-bit YMM register (X64 & AVX512_VL+).
886 : ASMJIT_X86_PHYS_REG(X86Ymm , ymm30, ymm[30]); //!< 256-bit YMM register (X64 & AVX512_VL+).
887 : ASMJIT_X86_PHYS_REG(X86Ymm , ymm31, ymm[31]); //!< 256-bit YMM register (X64 & AVX512_VL+).
888 :
889 : ASMJIT_X86_PHYS_REG(X86Zmm , zmm0 , zmm[0]); //!< 512-bit ZMM register.
890 : ASMJIT_X86_PHYS_REG(X86Zmm , zmm1 , zmm[1]); //!< 512-bit ZMM register.
891 : ASMJIT_X86_PHYS_REG(X86Zmm , zmm2 , zmm[2]); //!< 512-bit ZMM register.
892 : ASMJIT_X86_PHYS_REG(X86Zmm , zmm3 , zmm[3]); //!< 512-bit ZMM register.
893 : ASMJIT_X86_PHYS_REG(X86Zmm , zmm4 , zmm[4]); //!< 512-bit ZMM register.
894 : ASMJIT_X86_PHYS_REG(X86Zmm , zmm5 , zmm[5]); //!< 512-bit ZMM register.
895 : ASMJIT_X86_PHYS_REG(X86Zmm , zmm6 , zmm[6]); //!< 512-bit ZMM register.
896 : ASMJIT_X86_PHYS_REG(X86Zmm , zmm7 , zmm[7]); //!< 512-bit ZMM register.
897 : ASMJIT_X86_PHYS_REG(X86Zmm , zmm8 , zmm[8]); //!< 512-bit ZMM register (X64).
898 : ASMJIT_X86_PHYS_REG(X86Zmm , zmm9 , zmm[9]); //!< 512-bit ZMM register (X64).
899 : ASMJIT_X86_PHYS_REG(X86Zmm , zmm10, zmm[10]); //!< 512-bit ZMM register (X64).
900 : ASMJIT_X86_PHYS_REG(X86Zmm , zmm11, zmm[11]); //!< 512-bit ZMM register (X64).
901 : ASMJIT_X86_PHYS_REG(X86Zmm , zmm12, zmm[12]); //!< 512-bit ZMM register (X64).
902 : ASMJIT_X86_PHYS_REG(X86Zmm , zmm13, zmm[13]); //!< 512-bit ZMM register (X64).
903 : ASMJIT_X86_PHYS_REG(X86Zmm , zmm14, zmm[14]); //!< 512-bit ZMM register (X64).
904 : ASMJIT_X86_PHYS_REG(X86Zmm , zmm15, zmm[15]); //!< 512-bit ZMM register (X64).
905 : ASMJIT_X86_PHYS_REG(X86Zmm , zmm16, zmm[16]); //!< 512-bit ZMM register (X64 & AVX512_F+).
906 : ASMJIT_X86_PHYS_REG(X86Zmm , zmm17, zmm[17]); //!< 512-bit ZMM register (X64 & AVX512_F+).
907 : ASMJIT_X86_PHYS_REG(X86Zmm , zmm18, zmm[18]); //!< 512-bit ZMM register (X64 & AVX512_F+).
908 : ASMJIT_X86_PHYS_REG(X86Zmm , zmm19, zmm[19]); //!< 512-bit ZMM register (X64 & AVX512_F+).
909 : ASMJIT_X86_PHYS_REG(X86Zmm , zmm20, zmm[20]); //!< 512-bit ZMM register (X64 & AVX512_F+).
910 : ASMJIT_X86_PHYS_REG(X86Zmm , zmm21, zmm[21]); //!< 512-bit ZMM register (X64 & AVX512_F+).
911 : ASMJIT_X86_PHYS_REG(X86Zmm , zmm22, zmm[22]); //!< 512-bit ZMM register (X64 & AVX512_F+).
912 : ASMJIT_X86_PHYS_REG(X86Zmm , zmm23, zmm[23]); //!< 512-bit ZMM register (X64 & AVX512_F+).
913 : ASMJIT_X86_PHYS_REG(X86Zmm , zmm24, zmm[24]); //!< 512-bit ZMM register (X64 & AVX512_F+).
914 : ASMJIT_X86_PHYS_REG(X86Zmm , zmm25, zmm[25]); //!< 512-bit ZMM register (X64 & AVX512_F+).
915 : ASMJIT_X86_PHYS_REG(X86Zmm , zmm26, zmm[26]); //!< 512-bit ZMM register (X64 & AVX512_F+).
916 : ASMJIT_X86_PHYS_REG(X86Zmm , zmm27, zmm[27]); //!< 512-bit ZMM register (X64 & AVX512_F+).
917 : ASMJIT_X86_PHYS_REG(X86Zmm , zmm28, zmm[28]); //!< 512-bit ZMM register (X64 & AVX512_F+).
918 : ASMJIT_X86_PHYS_REG(X86Zmm , zmm29, zmm[29]); //!< 512-bit ZMM register (X64 & AVX512_F+).
919 : ASMJIT_X86_PHYS_REG(X86Zmm , zmm30, zmm[30]); //!< 512-bit ZMM register (X64 & AVX512_F+).
920 : ASMJIT_X86_PHYS_REG(X86Zmm , zmm31, zmm[31]); //!< 512-bit ZMM register (X64 & AVX512_F+).
921 :
922 : ASMJIT_X86_PHYS_REG(X86Bnd , bnd0 , bnd[0]); //!< 128-bit bound register.
923 : ASMJIT_X86_PHYS_REG(X86Bnd , bnd1 , bnd[1]); //!< 128-bit bound register.
924 : ASMJIT_X86_PHYS_REG(X86Bnd , bnd2 , bnd[2]); //!< 128-bit bound register.
925 : ASMJIT_X86_PHYS_REG(X86Bnd , bnd3 , bnd[3]); //!< 128-bit bound register.
926 :
927 : ASMJIT_X86_PHYS_REG(X86CReg, cr0 , cr[0]); //!< 32-bit or 64-bit control register.
928 : ASMJIT_X86_PHYS_REG(X86CReg, cr1 , cr[1]); //!< 32-bit or 64-bit control register.
929 : ASMJIT_X86_PHYS_REG(X86CReg, cr2 , cr[2]); //!< 32-bit or 64-bit control register.
930 : ASMJIT_X86_PHYS_REG(X86CReg, cr3 , cr[3]); //!< 32-bit or 64-bit control register.
931 : ASMJIT_X86_PHYS_REG(X86CReg, cr4 , cr[4]); //!< 32-bit or 64-bit control register.
932 : ASMJIT_X86_PHYS_REG(X86CReg, cr5 , cr[5]); //!< 32-bit or 64-bit control register.
933 : ASMJIT_X86_PHYS_REG(X86CReg, cr6 , cr[6]); //!< 32-bit or 64-bit control register.
934 : ASMJIT_X86_PHYS_REG(X86CReg, cr7 , cr[7]); //!< 32-bit or 64-bit control register.
935 : ASMJIT_X86_PHYS_REG(X86CReg, cr8 , cr[8]); //!< 32-bit or 64-bit control register.
936 : ASMJIT_X86_PHYS_REG(X86CReg, cr9 , cr[9]); //!< 32-bit or 64-bit control register.
937 : ASMJIT_X86_PHYS_REG(X86CReg, cr10 , cr[10]); //!< 32-bit or 64-bit control register.
938 : ASMJIT_X86_PHYS_REG(X86CReg, cr11 , cr[11]); //!< 32-bit or 64-bit control register.
939 : ASMJIT_X86_PHYS_REG(X86CReg, cr12 , cr[12]); //!< 32-bit or 64-bit control register.
940 : ASMJIT_X86_PHYS_REG(X86CReg, cr13 , cr[13]); //!< 32-bit or 64-bit control register.
941 : ASMJIT_X86_PHYS_REG(X86CReg, cr14 , cr[14]); //!< 32-bit or 64-bit control register.
942 : ASMJIT_X86_PHYS_REG(X86CReg, cr15 , cr[15]); //!< 32-bit or 64-bit control register.
943 :
944 : ASMJIT_X86_PHYS_REG(X86DReg, dr0 , dr[0]); //!< 32-bit or 64-bit debug register.
945 : ASMJIT_X86_PHYS_REG(X86DReg, dr1 , dr[1]); //!< 32-bit or 64-bit debug register.
946 : ASMJIT_X86_PHYS_REG(X86DReg, dr2 , dr[2]); //!< 32-bit or 64-bit debug register.
947 : ASMJIT_X86_PHYS_REG(X86DReg, dr3 , dr[3]); //!< 32-bit or 64-bit debug register.
948 : ASMJIT_X86_PHYS_REG(X86DReg, dr4 , dr[4]); //!< 32-bit or 64-bit debug register.
949 : ASMJIT_X86_PHYS_REG(X86DReg, dr5 , dr[5]); //!< 32-bit or 64-bit debug register.
950 : ASMJIT_X86_PHYS_REG(X86DReg, dr6 , dr[6]); //!< 32-bit or 64-bit debug register.
951 : ASMJIT_X86_PHYS_REG(X86DReg, dr7 , dr[7]); //!< 32-bit or 64-bit debug register.
952 : ASMJIT_X86_PHYS_REG(X86DReg, dr8 , dr[8]); //!< 32-bit or 64-bit debug register.
953 : ASMJIT_X86_PHYS_REG(X86DReg, dr9 , dr[9]); //!< 32-bit or 64-bit debug register.
954 : ASMJIT_X86_PHYS_REG(X86DReg, dr10 , dr[10]); //!< 32-bit or 64-bit debug register.
955 : ASMJIT_X86_PHYS_REG(X86DReg, dr11 , dr[11]); //!< 32-bit or 64-bit debug register.
956 : ASMJIT_X86_PHYS_REG(X86DReg, dr12 , dr[12]); //!< 32-bit or 64-bit debug register.
957 : ASMJIT_X86_PHYS_REG(X86DReg, dr13 , dr[13]); //!< 32-bit or 64-bit debug register.
958 : ASMJIT_X86_PHYS_REG(X86DReg, dr14 , dr[14]); //!< 32-bit or 64-bit debug register.
959 : ASMJIT_X86_PHYS_REG(X86DReg, dr15 , dr[15]); //!< 32-bit or 64-bit debug register.
960 :
961 : #undef ASMJIT_X86_PHYS_REG
962 : } // anonymous namespace
963 : #endif // !ASMJIT_EXPORTS_X86_OPERAND
964 :
965 : //! Create an 8-bit low GPB register operand.
966 : static ASMJIT_INLINE X86GpbLo gpb(uint32_t rId) noexcept { return X86GpbLo(rId); }
967 : //! Create an 8-bit low GPB register operand.
968 : static ASMJIT_INLINE X86GpbLo gpb_lo(uint32_t rId) noexcept { return X86GpbLo(rId); }
969 : //! Create an 8-bit high GPB register operand.
970 : static ASMJIT_INLINE X86GpbHi gpb_hi(uint32_t rId) noexcept { return X86GpbHi(rId); }
971 : //! Create a 16-bit GPW register operand.
972 : static ASMJIT_INLINE X86Gpw gpw(uint32_t rId) noexcept { return X86Gpw(rId); }
973 : //! Create a 32-bit GPD register operand.
974 : static ASMJIT_INLINE X86Gpd gpd(uint32_t rId) noexcept { return X86Gpd(rId); }
975 : //! Create a 64-bit GPQ register operand (X64).
976 : static ASMJIT_INLINE X86Gpq gpq(uint32_t rId) noexcept { return X86Gpq(rId); }
977 : //! Create an 80-bit Fp register operand.
978 : static ASMJIT_INLINE X86Fp fp(uint32_t rId) noexcept { return X86Fp(rId); }
979 : //! Create a 64-bit Mm register operand.
980 : static ASMJIT_INLINE X86Mm mm(uint32_t rId) noexcept { return X86Mm(rId); }
981 : //! Create a 64-bit K register operand.
982 : static ASMJIT_INLINE X86KReg k(uint32_t rId) noexcept { return X86KReg(rId); }
983 : //! Create a 128-bit XMM register operand.
984 : static ASMJIT_INLINE X86Xmm xmm(uint32_t rId) noexcept { return X86Xmm(rId); }
985 : //! Create a 256-bit YMM register operand.
986 : static ASMJIT_INLINE X86Ymm ymm(uint32_t rId) noexcept { return X86Ymm(rId); }
987 : //! Create a 512-bit ZMM register operand.
988 : static ASMJIT_INLINE X86Zmm zmm(uint32_t rId) noexcept { return X86Zmm(rId); }
989 : //! Create a 128-bit bound register operand.
990 : static ASMJIT_INLINE X86Bnd bnd(uint32_t rId) noexcept { return X86Bnd(rId); }
991 : //! Create a 32-bit or 64-bit control register operand.
992 : static ASMJIT_INLINE X86CReg cr(uint32_t rId) noexcept { return X86CReg(rId); }
993 : //! Create a 32-bit or 64-bit debug register operand.
994 : static ASMJIT_INLINE X86DReg dr(uint32_t rId) noexcept { return X86DReg(rId); }
995 :
996 : // ============================================================================
997 : // [asmjit::x86 - Ptr (Reg)]
998 : // ============================================================================
999 :
1000 : //! Create a `[base.reg + offset]` memory operand.
1001 : static ASMJIT_INLINE X86Mem ptr(const X86Gp& base, int32_t offset = 0, uint32_t size = 0) noexcept {
1002 : return X86Mem(base, offset, size);
1003 : }
1004 : //! Create a `[base.reg + (index << shift) + offset]` memory operand (scalar index).
1005 : static ASMJIT_INLINE X86Mem ptr(const X86Gp& base, const X86Gp& index, uint32_t shift = 0, int32_t offset = 0, uint32_t size = 0) noexcept {
1006 : return X86Mem(base, index, shift, offset, size);
1007 : }
1008 : //! Create a `[base.reg + (index << shift) + offset]` memory operand (vector index).
1009 : static ASMJIT_INLINE X86Mem ptr(const X86Gp& base, const X86Vec& index, uint32_t shift = 0, int32_t offset = 0, uint32_t size = 0) noexcept {
1010 : return X86Mem(base, index, shift, offset, size);
1011 : }
1012 :
1013 : //! Create a `[base + offset]` memory operand.
1014 : static ASMJIT_INLINE X86Mem ptr(const Label& base, int32_t offset = 0, uint32_t size = 0) noexcept {
1015 : return X86Mem(base, offset, size);
1016 : }
1017 : //! Create a `[base + (index << shift) + offset]` memory operand.
1018 : static ASMJIT_INLINE X86Mem ptr(const Label& base, const X86Gp& index, uint32_t shift, int32_t offset = 0, uint32_t size = 0) noexcept {
1019 : return X86Mem(base, index, shift, offset, size);
1020 : }
1021 : //! Create a `[base + (index << shift) + offset]` memory operand.
1022 : static ASMJIT_INLINE X86Mem ptr(const Label& base, const X86Vec& index, uint32_t shift, int32_t offset = 0, uint32_t size = 0) noexcept {
1023 : return X86Mem(base, index, shift, offset, size);
1024 : }
1025 :
1026 : //! Create `[rip + offset]` memory operand.
1027 : static ASMJIT_INLINE X86Mem ptr(const X86Rip& rip_, int32_t offset = 0, uint32_t size = 0) noexcept {
1028 : return X86Mem(rip_, offset, size);
1029 : }
1030 :
1031 : //! Create an `[base]` absolute memory operand.
1032 : static ASMJIT_INLINE X86Mem ptr(uint64_t base, uint32_t size = 0) noexcept {
1033 : return X86Mem(base, size);
1034 : }
1035 : //! Create an `[abs + (index.reg << shift)]` absolute memory operand.
1036 : static ASMJIT_INLINE X86Mem ptr(uint64_t base, const X86Reg& index, uint32_t shift = 0, uint32_t size = 0) noexcept {
1037 : return X86Mem(base, index, shift, size);
1038 : }
1039 : //! Create an `[abs + (index.reg << shift)]` absolute memory operand.
1040 : static ASMJIT_INLINE X86Mem ptr(uint64_t base, const X86Vec& index, uint32_t shift = 0, uint32_t size = 0) noexcept {
1041 : return X86Mem(base, index, shift, size);
1042 : }
1043 :
1044 : //! \internal
1045 : #define ASMJIT_X86_PTR_FN(FUNC, SIZE) \
1046 : /*! Create a `[base + offset]` memory operand. */ \
1047 : static ASMJIT_INLINE X86Mem FUNC(const X86Gp& base, int32_t offset = 0) noexcept { \
1048 : return X86Mem(base, offset, SIZE); \
1049 : } \
1050 : /*! Create a `[base + (index << shift) + offset]` memory operand. */ \
1051 : static ASMJIT_INLINE X86Mem FUNC(const X86Gp& base, const X86Gp& index, uint32_t shift = 0, int32_t offset = 0) noexcept { \
1052 : return X86Mem(base, index, shift, offset, SIZE); \
1053 : } \
1054 : /*! Create a `[base + (vec_index << shift) + offset]` memory operand. */ \
1055 : static ASMJIT_INLINE X86Mem FUNC(const X86Gp& base, const X86Vec& index, uint32_t shift = 0, int32_t offset = 0) noexcept { \
1056 : return X86Mem(base, index, shift, offset, SIZE); \
1057 : } \
1058 : /*! Create a `[base + offset]` memory operand. */ \
1059 : static ASMJIT_INLINE X86Mem FUNC(const Label& base, int32_t offset = 0) noexcept { \
1060 : return X86Mem(base, offset, SIZE); \
1061 : } \
1062 : /*! Create a `[base + (index << shift) + offset]` memory operand. */ \
1063 : static ASMJIT_INLINE X86Mem FUNC(const Label& base, const X86Gp& index, uint32_t shift, int32_t offset = 0) noexcept { \
1064 : return X86Mem(base, index, shift, offset, SIZE); \
1065 : } \
1066 : /*! Create a `[rip + offset]` memory operand. */ \
1067 : static ASMJIT_INLINE X86Mem FUNC(const X86Rip& rip_, int32_t offset = 0) noexcept { \
1068 : return X86Mem(rip_, offset, SIZE); \
1069 : } \
1070 : /*! Create a `[base + offset]` memory operand. */ \
1071 : static ASMJIT_INLINE X86Mem FUNC(uint64_t base) noexcept { \
1072 : return X86Mem(base, SIZE); \
1073 : } \
1074 : /*! Create a `[base + (index << shift) + offset]` memory operand. */ \
1075 : static ASMJIT_INLINE X86Mem FUNC(uint64_t base, const X86Gp& index, uint32_t shift = 0) noexcept { \
1076 : return X86Mem(base, index, shift, SIZE); \
1077 : } \
1078 : /*! Create a `[base + (vec_index << shift) + offset]` memory operand. */ \
1079 : static ASMJIT_INLINE X86Mem FUNC(uint64_t base, const X86Vec& index, uint32_t shift = 0) noexcept { \
1080 : return X86Mem(base, index, shift, SIZE, Mem::kSignatureMemAbs); \
1081 : } \
1082 : /*! Create a `[base + offset]` memory operand. */ \
1083 : static ASMJIT_INLINE X86Mem FUNC##_abs(uint64_t base) noexcept { \
1084 : return X86Mem(base, SIZE); \
1085 : } \
1086 : /*! Create a `[base + (index << shift) + offset]` memory operand. */ \
1087 : static ASMJIT_INLINE X86Mem FUNC##_abs(uint64_t base, const X86Gp& index, uint32_t shift = 0) noexcept { \
1088 : return X86Mem(base, index, shift, SIZE, Mem::kSignatureMemAbs); \
1089 : } \
1090 : /*! Create a `[base + (vec_index << shift) + offset]` memory operand. */ \
1091 : static ASMJIT_INLINE X86Mem FUNC##_abs(uint64_t base, const X86Vec& index, uint32_t shift = 0) noexcept { \
1092 : return X86Mem(base, index, shift, SIZE, Mem::kSignatureMemAbs); \
1093 : }
1094 :
1095 : // Define memory operand constructors that use platform independent naming.
1096 : ASMJIT_X86_PTR_FN(ptr_8, 1)
1097 : ASMJIT_X86_PTR_FN(ptr_16, 2)
1098 : ASMJIT_X86_PTR_FN(ptr_32, 4)
1099 : ASMJIT_X86_PTR_FN(ptr_48, 6)
1100 : ASMJIT_X86_PTR_FN(ptr_64, 8)
1101 : ASMJIT_X86_PTR_FN(ptr_80, 10)
1102 : ASMJIT_X86_PTR_FN(ptr_128, 16)
1103 : ASMJIT_X86_PTR_FN(ptr_256, 32)
1104 : ASMJIT_X86_PTR_FN(ptr_512, 64)
1105 :
1106 : // Define memory operand constructors that use X86/X64 specific naming.
1107 : ASMJIT_X86_PTR_FN(byte_ptr, 1)
1108 : ASMJIT_X86_PTR_FN(word_ptr, 2)
1109 : ASMJIT_X86_PTR_FN(dword_ptr, 4)
1110 : ASMJIT_X86_PTR_FN(qword_ptr, 8)
1111 : ASMJIT_X86_PTR_FN(tword_ptr, 10)
1112 : ASMJIT_X86_PTR_FN(oword_ptr, 16)
1113 : ASMJIT_X86_PTR_FN(dqword_ptr, 16)
1114 : ASMJIT_X86_PTR_FN(yword_ptr, 32)
1115 : ASMJIT_X86_PTR_FN(zword_ptr, 64)
1116 :
1117 : #undef ASMJIT_X86_PTR_FN
1118 :
1119 : } // x86 namespace
1120 :
1121 : //! \}
1122 :
1123 : } // asmjit namespace
1124 : } // namespace PLMD
1125 :
1126 : // [Api-End]
1127 : #include "./asmjit_apiend.h"
1128 :
1129 : // [Guard]
1130 : #endif // _ASMJIT_X86_X86OPERAND_H
1131 : #pragma GCC diagnostic pop
1132 : #endif // __PLUMED_HAS_ASMJIT
1133 : #endif
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