Line data Source code
1 : /* +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
2 : Copyright (c) 2008-2017, Petr Kobalicek
3 :
4 : This software is provided 'as-is', without any express or implied
5 : warranty. In no event will the authors be held liable for any damages
6 : arising from the use of this software.
7 :
8 : Permission is granted to anyone to use this software for any purpose,
9 : including commercial applications, and to alter it and redistribute it
10 : freely, subject to the following restrictions:
11 :
12 : 1. The origin of this software must not be misrepresented; you must not
13 : claim that you wrote the original software. If you use this software
14 : in a product, an acknowledgment in the product documentation would be
15 : appreciated but is not required.
16 : 2. Altered source versions must be plainly marked as such, and must not be
17 : misrepresented as being the original software.
18 : 3. This notice may not be removed or altered from any source distribution.
19 : +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ */
20 : #ifndef __PLUMED_asmjit_x86inst_h
21 : #define __PLUMED_asmjit_x86inst_h
22 : #ifdef __PLUMED_HAS_ASMJIT
23 : #pragma GCC diagnostic push
24 : #pragma GCC diagnostic ignored "-Wpedantic"
25 : // [AsmJit]
26 : // Complete x86/x64 JIT and Remote Assembler for C++.
27 : //
28 : // [License]
29 : // Zlib - See LICENSE.md file in the package.
30 :
31 : // [Guard]
32 : #ifndef _ASMJIT_X86_X86INST_H
33 : #define _ASMJIT_X86_X86INST_H
34 :
35 : // [Dependencies]
36 : #include "./assembler.h" // TODO: Is that necessary?
37 : #include "./inst.h"
38 : #include "./operand.h"
39 : #include "./utils.h"
40 : #include "./x86globals.h"
41 :
42 : // [Api-Begin]
43 : #include "./asmjit_apibegin.h"
44 :
45 : namespace PLMD {
46 : namespace asmjit {
47 :
48 : //! \addtogroup asmjit_x86
49 : //! \{
50 :
51 : // ============================================================================
52 : // [asmjit::X86Inst]
53 : // ============================================================================
54 :
55 : //! X86/X64 instruction data.
56 : struct X86Inst {
57 : //! Instruction id (AsmJit specific).
58 : //!
59 : //! Each instruction has a unique ID that is used as an index to AsmJit's
60 : //! instruction table. Instructions are sorted alphabetically.
61 : ASMJIT_ENUM(Id) {
62 : // ${idData:Begin}
63 : kIdNone = 0,
64 : kIdAaa, // [X86]
65 : kIdAad, // [X86]
66 : kIdAam, // [X86]
67 : kIdAas, // [X86]
68 : kIdAdc, // [ANY]
69 : kIdAdcx, // [ANY] {ADX}
70 : kIdAdd, // [ANY]
71 : kIdAddpd, // [ANY] {SSE2}
72 : kIdAddps, // [ANY] {SSE}
73 : kIdAddsd, // [ANY] {SSE2}
74 : kIdAddss, // [ANY] {SSE}
75 : kIdAddsubpd, // [ANY] {SSE3}
76 : kIdAddsubps, // [ANY] {SSE3}
77 : kIdAdox, // [ANY] {ADX}
78 : kIdAesdec, // [ANY] {AESNI}
79 : kIdAesdeclast, // [ANY] {AESNI}
80 : kIdAesenc, // [ANY] {AESNI}
81 : kIdAesenclast, // [ANY] {AESNI}
82 : kIdAesimc, // [ANY] {AESNI}
83 : kIdAeskeygenassist, // [ANY] {AESNI}
84 : kIdAnd, // [ANY]
85 : kIdAndn, // [ANY] {BMI}
86 : kIdAndnpd, // [ANY] {SSE2}
87 : kIdAndnps, // [ANY] {SSE}
88 : kIdAndpd, // [ANY] {SSE2}
89 : kIdAndps, // [ANY] {SSE}
90 : kIdArpl, // [X86]
91 : kIdBextr, // [ANY] {BMI}
92 : kIdBlcfill, // [ANY] {TBM}
93 : kIdBlci, // [ANY] {TBM}
94 : kIdBlcic, // [ANY] {TBM}
95 : kIdBlcmsk, // [ANY] {TBM}
96 : kIdBlcs, // [ANY] {TBM}
97 : kIdBlendpd, // [ANY] {SSE4_1}
98 : kIdBlendps, // [ANY] {SSE4_1}
99 : kIdBlendvpd, // [ANY] {SSE4_1}
100 : kIdBlendvps, // [ANY] {SSE4_1}
101 : kIdBlsfill, // [ANY] {TBM}
102 : kIdBlsi, // [ANY] {BMI}
103 : kIdBlsic, // [ANY] {TBM}
104 : kIdBlsmsk, // [ANY] {BMI}
105 : kIdBlsr, // [ANY] {BMI}
106 : kIdBndcl, // [ANY] {MPX}
107 : kIdBndcn, // [ANY] {MPX}
108 : kIdBndcu, // [ANY] {MPX}
109 : kIdBndldx, // [ANY] {MPX}
110 : kIdBndmk, // [ANY] {MPX}
111 : kIdBndmov, // [ANY] {MPX}
112 : kIdBndstx, // [ANY] {MPX}
113 : kIdBound, // [X86]
114 : kIdBsf, // [ANY]
115 : kIdBsr, // [ANY]
116 : kIdBswap, // [ANY]
117 : kIdBt, // [ANY]
118 : kIdBtc, // [ANY]
119 : kIdBtr, // [ANY]
120 : kIdBts, // [ANY]
121 : kIdBzhi, // [ANY] {BMI2}
122 : kIdCall, // [ANY]
123 : kIdCbw, // [ANY]
124 : kIdCdq, // [ANY]
125 : kIdCdqe, // [X64]
126 : kIdClac, // [ANY] {SMAP}
127 : kIdClc, // [ANY]
128 : kIdCld, // [ANY]
129 : kIdClflush, // [ANY] {CLFLUSH}
130 : kIdClflushopt, // [ANY] {CLFLUSHOPT}
131 : kIdCli, // [ANY]
132 : kIdClts, // [ANY]
133 : kIdClwb, // [ANY] {CLWB}
134 : kIdClzero, // [ANY] {CLZERO}
135 : kIdCmc, // [ANY]
136 : kIdCmova, // [ANY] {CMOV}
137 : kIdCmovae, // [ANY] {CMOV}
138 : kIdCmovb, // [ANY] {CMOV}
139 : kIdCmovbe, // [ANY] {CMOV}
140 : kIdCmovc, // [ANY] {CMOV}
141 : kIdCmove, // [ANY] {CMOV}
142 : kIdCmovg, // [ANY] {CMOV}
143 : kIdCmovge, // [ANY] {CMOV}
144 : kIdCmovl, // [ANY] {CMOV}
145 : kIdCmovle, // [ANY] {CMOV}
146 : kIdCmovna, // [ANY] {CMOV}
147 : kIdCmovnae, // [ANY] {CMOV}
148 : kIdCmovnb, // [ANY] {CMOV}
149 : kIdCmovnbe, // [ANY] {CMOV}
150 : kIdCmovnc, // [ANY] {CMOV}
151 : kIdCmovne, // [ANY] {CMOV}
152 : kIdCmovng, // [ANY] {CMOV}
153 : kIdCmovnge, // [ANY] {CMOV}
154 : kIdCmovnl, // [ANY] {CMOV}
155 : kIdCmovnle, // [ANY] {CMOV}
156 : kIdCmovno, // [ANY] {CMOV}
157 : kIdCmovnp, // [ANY] {CMOV}
158 : kIdCmovns, // [ANY] {CMOV}
159 : kIdCmovnz, // [ANY] {CMOV}
160 : kIdCmovo, // [ANY] {CMOV}
161 : kIdCmovp, // [ANY] {CMOV}
162 : kIdCmovpe, // [ANY] {CMOV}
163 : kIdCmovpo, // [ANY] {CMOV}
164 : kIdCmovs, // [ANY] {CMOV}
165 : kIdCmovz, // [ANY] {CMOV}
166 : kIdCmp, // [ANY]
167 : kIdCmppd, // [ANY] {SSE2}
168 : kIdCmpps, // [ANY] {SSE}
169 : kIdCmps, // [ANY]
170 : kIdCmpsd, // [ANY] {SSE2}
171 : kIdCmpss, // [ANY] {SSE}
172 : kIdCmpxchg, // [ANY] {I486}
173 : kIdCmpxchg16b, // [X64] {CMPXCHG16B}
174 : kIdCmpxchg8b, // [ANY] {CMPXCHG8B}
175 : kIdComisd, // [ANY] {SSE2}
176 : kIdComiss, // [ANY] {SSE}
177 : kIdCpuid, // [ANY] {I486}
178 : kIdCqo, // [X64]
179 : kIdCrc32, // [ANY] {SSE4_2}
180 : kIdCvtdq2pd, // [ANY] {SSE2}
181 : kIdCvtdq2ps, // [ANY] {SSE2}
182 : kIdCvtpd2dq, // [ANY] {SSE2}
183 : kIdCvtpd2pi, // [ANY] {SSE2}
184 : kIdCvtpd2ps, // [ANY] {SSE2}
185 : kIdCvtpi2pd, // [ANY] {SSE2}
186 : kIdCvtpi2ps, // [ANY] {SSE}
187 : kIdCvtps2dq, // [ANY] {SSE2}
188 : kIdCvtps2pd, // [ANY] {SSE2}
189 : kIdCvtps2pi, // [ANY] {SSE}
190 : kIdCvtsd2si, // [ANY] {SSE2}
191 : kIdCvtsd2ss, // [ANY] {SSE2}
192 : kIdCvtsi2sd, // [ANY] {SSE2}
193 : kIdCvtsi2ss, // [ANY] {SSE}
194 : kIdCvtss2sd, // [ANY] {SSE2}
195 : kIdCvtss2si, // [ANY] {SSE}
196 : kIdCvttpd2dq, // [ANY] {SSE2}
197 : kIdCvttpd2pi, // [ANY] {SSE2}
198 : kIdCvttps2dq, // [ANY] {SSE2}
199 : kIdCvttps2pi, // [ANY] {SSE}
200 : kIdCvttsd2si, // [ANY] {SSE2}
201 : kIdCvttss2si, // [ANY] {SSE}
202 : kIdCwd, // [ANY]
203 : kIdCwde, // [ANY]
204 : kIdDaa, // [X86]
205 : kIdDas, // [X86]
206 : kIdDec, // [ANY]
207 : kIdDiv, // [ANY]
208 : kIdDivpd, // [ANY] {SSE2}
209 : kIdDivps, // [ANY] {SSE}
210 : kIdDivsd, // [ANY] {SSE2}
211 : kIdDivss, // [ANY] {SSE}
212 : kIdDppd, // [ANY] {SSE4_1}
213 : kIdDpps, // [ANY] {SSE4_1}
214 : kIdEmms, // [ANY] {MMX}
215 : kIdEnter, // [ANY]
216 : kIdExtractps, // [ANY] {SSE4_1}
217 : kIdExtrq, // [ANY] {SSE4A}
218 : kIdF2xm1, // [ANY]
219 : kIdFabs, // [ANY]
220 : kIdFadd, // [ANY]
221 : kIdFaddp, // [ANY]
222 : kIdFbld, // [ANY]
223 : kIdFbstp, // [ANY]
224 : kIdFchs, // [ANY]
225 : kIdFclex, // [ANY]
226 : kIdFcmovb, // [ANY] {CMOV}
227 : kIdFcmovbe, // [ANY] {CMOV}
228 : kIdFcmove, // [ANY] {CMOV}
229 : kIdFcmovnb, // [ANY] {CMOV}
230 : kIdFcmovnbe, // [ANY] {CMOV}
231 : kIdFcmovne, // [ANY] {CMOV}
232 : kIdFcmovnu, // [ANY] {CMOV}
233 : kIdFcmovu, // [ANY] {CMOV}
234 : kIdFcom, // [ANY]
235 : kIdFcomi, // [ANY]
236 : kIdFcomip, // [ANY]
237 : kIdFcomp, // [ANY]
238 : kIdFcompp, // [ANY]
239 : kIdFcos, // [ANY]
240 : kIdFdecstp, // [ANY]
241 : kIdFdiv, // [ANY]
242 : kIdFdivp, // [ANY]
243 : kIdFdivr, // [ANY]
244 : kIdFdivrp, // [ANY]
245 : kIdFemms, // [ANY] {3DNOW}
246 : kIdFfree, // [ANY]
247 : kIdFiadd, // [ANY]
248 : kIdFicom, // [ANY]
249 : kIdFicomp, // [ANY]
250 : kIdFidiv, // [ANY]
251 : kIdFidivr, // [ANY]
252 : kIdFild, // [ANY]
253 : kIdFimul, // [ANY]
254 : kIdFincstp, // [ANY]
255 : kIdFinit, // [ANY]
256 : kIdFist, // [ANY]
257 : kIdFistp, // [ANY]
258 : kIdFisttp, // [ANY] {SSE3}
259 : kIdFisub, // [ANY]
260 : kIdFisubr, // [ANY]
261 : kIdFld, // [ANY]
262 : kIdFld1, // [ANY]
263 : kIdFldcw, // [ANY]
264 : kIdFldenv, // [ANY]
265 : kIdFldl2e, // [ANY]
266 : kIdFldl2t, // [ANY]
267 : kIdFldlg2, // [ANY]
268 : kIdFldln2, // [ANY]
269 : kIdFldpi, // [ANY]
270 : kIdFldz, // [ANY]
271 : kIdFmul, // [ANY]
272 : kIdFmulp, // [ANY]
273 : kIdFnclex, // [ANY]
274 : kIdFninit, // [ANY]
275 : kIdFnop, // [ANY]
276 : kIdFnsave, // [ANY]
277 : kIdFnstcw, // [ANY]
278 : kIdFnstenv, // [ANY]
279 : kIdFnstsw, // [ANY]
280 : kIdFpatan, // [ANY]
281 : kIdFprem, // [ANY]
282 : kIdFprem1, // [ANY]
283 : kIdFptan, // [ANY]
284 : kIdFrndint, // [ANY]
285 : kIdFrstor, // [ANY]
286 : kIdFsave, // [ANY]
287 : kIdFscale, // [ANY]
288 : kIdFsin, // [ANY]
289 : kIdFsincos, // [ANY]
290 : kIdFsqrt, // [ANY]
291 : kIdFst, // [ANY]
292 : kIdFstcw, // [ANY]
293 : kIdFstenv, // [ANY]
294 : kIdFstp, // [ANY]
295 : kIdFstsw, // [ANY]
296 : kIdFsub, // [ANY]
297 : kIdFsubp, // [ANY]
298 : kIdFsubr, // [ANY]
299 : kIdFsubrp, // [ANY]
300 : kIdFtst, // [ANY]
301 : kIdFucom, // [ANY]
302 : kIdFucomi, // [ANY]
303 : kIdFucomip, // [ANY]
304 : kIdFucomp, // [ANY]
305 : kIdFucompp, // [ANY]
306 : kIdFwait, // [ANY]
307 : kIdFxam, // [ANY]
308 : kIdFxch, // [ANY]
309 : kIdFxrstor, // [ANY] {FXSR}
310 : kIdFxrstor64, // [X64] {FXSR}
311 : kIdFxsave, // [ANY] {FXSR}
312 : kIdFxsave64, // [X64] {FXSR}
313 : kIdFxtract, // [ANY]
314 : kIdFyl2x, // [ANY]
315 : kIdFyl2xp1, // [ANY]
316 : kIdHaddpd, // [ANY] {SSE3}
317 : kIdHaddps, // [ANY] {SSE3}
318 : kIdHlt, // [ANY]
319 : kIdHsubpd, // [ANY] {SSE3}
320 : kIdHsubps, // [ANY] {SSE3}
321 : kIdIdiv, // [ANY]
322 : kIdImul, // [ANY]
323 : kIdIn, // [ANY]
324 : kIdInc, // [ANY]
325 : kIdIns, // [ANY]
326 : kIdInsertps, // [ANY] {SSE4_1}
327 : kIdInsertq, // [ANY] {SSE4A}
328 : kIdInt, // [ANY]
329 : kIdInt3, // [ANY]
330 : kIdInto, // [X86]
331 : kIdInvd, // [ANY] {I486}
332 : kIdInvlpg, // [ANY] {I486}
333 : kIdInvpcid, // [ANY] {I486}
334 : kIdIret, // [ANY]
335 : kIdIretd, // [ANY]
336 : kIdIretq, // [X64]
337 : kIdIretw, // [ANY]
338 : kIdJa, // [ANY]
339 : kIdJae, // [ANY]
340 : kIdJb, // [ANY]
341 : kIdJbe, // [ANY]
342 : kIdJc, // [ANY]
343 : kIdJe, // [ANY]
344 : kIdJecxz, // [ANY]
345 : kIdJg, // [ANY]
346 : kIdJge, // [ANY]
347 : kIdJl, // [ANY]
348 : kIdJle, // [ANY]
349 : kIdJmp, // [ANY]
350 : kIdJna, // [ANY]
351 : kIdJnae, // [ANY]
352 : kIdJnb, // [ANY]
353 : kIdJnbe, // [ANY]
354 : kIdJnc, // [ANY]
355 : kIdJne, // [ANY]
356 : kIdJng, // [ANY]
357 : kIdJnge, // [ANY]
358 : kIdJnl, // [ANY]
359 : kIdJnle, // [ANY]
360 : kIdJno, // [ANY]
361 : kIdJnp, // [ANY]
362 : kIdJns, // [ANY]
363 : kIdJnz, // [ANY]
364 : kIdJo, // [ANY]
365 : kIdJp, // [ANY]
366 : kIdJpe, // [ANY]
367 : kIdJpo, // [ANY]
368 : kIdJs, // [ANY]
369 : kIdJz, // [ANY]
370 : kIdKaddb, // [ANY] {AVX512_DQ}
371 : kIdKaddd, // [ANY] {AVX512_BW}
372 : kIdKaddq, // [ANY] {AVX512_BW}
373 : kIdKaddw, // [ANY] {AVX512_DQ}
374 : kIdKandb, // [ANY] {AVX512_DQ}
375 : kIdKandd, // [ANY] {AVX512_BW}
376 : kIdKandnb, // [ANY] {AVX512_DQ}
377 : kIdKandnd, // [ANY] {AVX512_BW}
378 : kIdKandnq, // [ANY] {AVX512_BW}
379 : kIdKandnw, // [ANY] {AVX512_F}
380 : kIdKandq, // [ANY] {AVX512_BW}
381 : kIdKandw, // [ANY] {AVX512_F}
382 : kIdKmovb, // [ANY] {AVX512_DQ}
383 : kIdKmovd, // [ANY] {AVX512_BW}
384 : kIdKmovq, // [ANY] {AVX512_BW}
385 : kIdKmovw, // [ANY] {AVX512_F}
386 : kIdKnotb, // [ANY] {AVX512_DQ}
387 : kIdKnotd, // [ANY] {AVX512_BW}
388 : kIdKnotq, // [ANY] {AVX512_BW}
389 : kIdKnotw, // [ANY] {AVX512_F}
390 : kIdKorb, // [ANY] {AVX512_DQ}
391 : kIdKord, // [ANY] {AVX512_BW}
392 : kIdKorq, // [ANY] {AVX512_BW}
393 : kIdKortestb, // [ANY] {AVX512_DQ}
394 : kIdKortestd, // [ANY] {AVX512_BW}
395 : kIdKortestq, // [ANY] {AVX512_BW}
396 : kIdKortestw, // [ANY] {AVX512_F}
397 : kIdKorw, // [ANY] {AVX512_F}
398 : kIdKshiftlb, // [ANY] {AVX512_DQ}
399 : kIdKshiftld, // [ANY] {AVX512_BW}
400 : kIdKshiftlq, // [ANY] {AVX512_BW}
401 : kIdKshiftlw, // [ANY] {AVX512_F}
402 : kIdKshiftrb, // [ANY] {AVX512_DQ}
403 : kIdKshiftrd, // [ANY] {AVX512_BW}
404 : kIdKshiftrq, // [ANY] {AVX512_BW}
405 : kIdKshiftrw, // [ANY] {AVX512_F}
406 : kIdKtestb, // [ANY] {AVX512_DQ}
407 : kIdKtestd, // [ANY] {AVX512_BW}
408 : kIdKtestq, // [ANY] {AVX512_BW}
409 : kIdKtestw, // [ANY] {AVX512_DQ}
410 : kIdKunpckbw, // [ANY] {AVX512_F}
411 : kIdKunpckdq, // [ANY] {AVX512_BW}
412 : kIdKunpckwd, // [ANY] {AVX512_BW}
413 : kIdKxnorb, // [ANY] {AVX512_DQ}
414 : kIdKxnord, // [ANY] {AVX512_BW}
415 : kIdKxnorq, // [ANY] {AVX512_BW}
416 : kIdKxnorw, // [ANY] {AVX512_F}
417 : kIdKxorb, // [ANY] {AVX512_DQ}
418 : kIdKxord, // [ANY] {AVX512_BW}
419 : kIdKxorq, // [ANY] {AVX512_BW}
420 : kIdKxorw, // [ANY] {AVX512_F}
421 : kIdLahf, // [ANY] {LAHFSAHF}
422 : kIdLar, // [ANY]
423 : kIdLddqu, // [ANY] {SSE3}
424 : kIdLdmxcsr, // [ANY] {SSE}
425 : kIdLds, // [X86]
426 : kIdLea, // [ANY]
427 : kIdLeave, // [ANY]
428 : kIdLes, // [X86]
429 : kIdLfence, // [ANY] {SSE2}
430 : kIdLfs, // [ANY]
431 : kIdLgdt, // [ANY]
432 : kIdLgs, // [ANY]
433 : kIdLidt, // [ANY]
434 : kIdLldt, // [ANY]
435 : kIdLmsw, // [ANY]
436 : kIdLods, // [ANY]
437 : kIdLoop, // [ANY]
438 : kIdLoope, // [ANY]
439 : kIdLoopne, // [ANY]
440 : kIdLsl, // [ANY]
441 : kIdLss, // [ANY]
442 : kIdLtr, // [ANY]
443 : kIdLzcnt, // [ANY] {LZCNT}
444 : kIdMaskmovdqu, // [ANY] {SSE2}
445 : kIdMaskmovq, // [ANY] {MMX2}
446 : kIdMaxpd, // [ANY] {SSE2}
447 : kIdMaxps, // [ANY] {SSE}
448 : kIdMaxsd, // [ANY] {SSE2}
449 : kIdMaxss, // [ANY] {SSE}
450 : kIdMfence, // [ANY] {SSE2}
451 : kIdMinpd, // [ANY] {SSE2}
452 : kIdMinps, // [ANY] {SSE}
453 : kIdMinsd, // [ANY] {SSE2}
454 : kIdMinss, // [ANY] {SSE}
455 : kIdMonitor, // [ANY] {MONITOR}
456 : kIdMov, // [ANY]
457 : kIdMovapd, // [ANY] {SSE2}
458 : kIdMovaps, // [ANY] {SSE}
459 : kIdMovbe, // [ANY] {MOVBE}
460 : kIdMovd, // [ANY] {MMX|SSE2}
461 : kIdMovddup, // [ANY] {SSE3}
462 : kIdMovdq2q, // [ANY] {SSE2}
463 : kIdMovdqa, // [ANY] {SSE2}
464 : kIdMovdqu, // [ANY] {SSE2}
465 : kIdMovhlps, // [ANY] {SSE}
466 : kIdMovhpd, // [ANY] {SSE2}
467 : kIdMovhps, // [ANY] {SSE}
468 : kIdMovlhps, // [ANY] {SSE}
469 : kIdMovlpd, // [ANY] {SSE2}
470 : kIdMovlps, // [ANY] {SSE}
471 : kIdMovmskpd, // [ANY] {SSE2}
472 : kIdMovmskps, // [ANY] {SSE}
473 : kIdMovntdq, // [ANY] {SSE2}
474 : kIdMovntdqa, // [ANY] {SSE4_1}
475 : kIdMovnti, // [ANY] {SSE2}
476 : kIdMovntpd, // [ANY] {SSE2}
477 : kIdMovntps, // [ANY] {SSE}
478 : kIdMovntq, // [ANY] {MMX2}
479 : kIdMovntsd, // [ANY] {SSE4A}
480 : kIdMovntss, // [ANY] {SSE4A}
481 : kIdMovq, // [ANY] {MMX|SSE2}
482 : kIdMovq2dq, // [ANY] {SSE2}
483 : kIdMovs, // [ANY]
484 : kIdMovsd, // [ANY] {SSE2}
485 : kIdMovshdup, // [ANY] {SSE3}
486 : kIdMovsldup, // [ANY] {SSE3}
487 : kIdMovss, // [ANY] {SSE}
488 : kIdMovsx, // [ANY]
489 : kIdMovsxd, // [X64]
490 : kIdMovupd, // [ANY] {SSE2}
491 : kIdMovups, // [ANY] {SSE}
492 : kIdMovzx, // [ANY]
493 : kIdMpsadbw, // [ANY] {SSE4_1}
494 : kIdMul, // [ANY]
495 : kIdMulpd, // [ANY] {SSE2}
496 : kIdMulps, // [ANY] {SSE}
497 : kIdMulsd, // [ANY] {SSE2}
498 : kIdMulss, // [ANY] {SSE}
499 : kIdMulx, // [ANY] {BMI2}
500 : kIdMwait, // [ANY] {MONITOR}
501 : kIdNeg, // [ANY]
502 : kIdNop, // [ANY]
503 : kIdNot, // [ANY]
504 : kIdOr, // [ANY]
505 : kIdOrpd, // [ANY] {SSE2}
506 : kIdOrps, // [ANY] {SSE}
507 : kIdOut, // [ANY]
508 : kIdOuts, // [ANY]
509 : kIdPabsb, // [ANY] {SSSE3}
510 : kIdPabsd, // [ANY] {SSSE3}
511 : kIdPabsw, // [ANY] {SSSE3}
512 : kIdPackssdw, // [ANY] {MMX|SSE2}
513 : kIdPacksswb, // [ANY] {MMX|SSE2}
514 : kIdPackusdw, // [ANY] {SSE4_1}
515 : kIdPackuswb, // [ANY] {MMX|SSE2}
516 : kIdPaddb, // [ANY] {MMX|SSE2}
517 : kIdPaddd, // [ANY] {MMX|SSE2}
518 : kIdPaddq, // [ANY] {SSE2}
519 : kIdPaddsb, // [ANY] {MMX|SSE2}
520 : kIdPaddsw, // [ANY] {MMX|SSE2}
521 : kIdPaddusb, // [ANY] {MMX|SSE2}
522 : kIdPaddusw, // [ANY] {MMX|SSE2}
523 : kIdPaddw, // [ANY] {MMX|SSE2}
524 : kIdPalignr, // [ANY] {SSE3}
525 : kIdPand, // [ANY] {MMX|SSE2}
526 : kIdPandn, // [ANY] {MMX|SSE2}
527 : kIdPause, // [ANY]
528 : kIdPavgb, // [ANY] {MMX2|SSE2}
529 : kIdPavgusb, // [ANY] {3DNOW}
530 : kIdPavgw, // [ANY] {MMX2|SSE2}
531 : kIdPblendvb, // [ANY] {SSE4_1}
532 : kIdPblendw, // [ANY] {SSE4_1}
533 : kIdPclmulqdq, // [ANY] {PCLMULQDQ}
534 : kIdPcmpeqb, // [ANY] {MMX|SSE2}
535 : kIdPcmpeqd, // [ANY] {MMX|SSE2}
536 : kIdPcmpeqq, // [ANY] {SSE4_1}
537 : kIdPcmpeqw, // [ANY] {MMX|SSE2}
538 : kIdPcmpestri, // [ANY] {SSE4_2}
539 : kIdPcmpestrm, // [ANY] {SSE4_2}
540 : kIdPcmpgtb, // [ANY] {MMX|SSE2}
541 : kIdPcmpgtd, // [ANY] {MMX|SSE2}
542 : kIdPcmpgtq, // [ANY] {SSE4_2}
543 : kIdPcmpgtw, // [ANY] {MMX|SSE2}
544 : kIdPcmpistri, // [ANY] {SSE4_2}
545 : kIdPcmpistrm, // [ANY] {SSE4_2}
546 : kIdPcommit, // [ANY] {PCOMMIT}
547 : kIdPdep, // [ANY] {BMI2}
548 : kIdPext, // [ANY] {BMI2}
549 : kIdPextrb, // [ANY] {SSE4_1}
550 : kIdPextrd, // [ANY] {SSE4_1}
551 : kIdPextrq, // [X64] {SSE4_1}
552 : kIdPextrw, // [ANY] {MMX2|SSE2|SSE4_1}
553 : kIdPf2id, // [ANY] {3DNOW}
554 : kIdPf2iw, // [ANY] {3DNOW2}
555 : kIdPfacc, // [ANY] {3DNOW}
556 : kIdPfadd, // [ANY] {3DNOW}
557 : kIdPfcmpeq, // [ANY] {3DNOW}
558 : kIdPfcmpge, // [ANY] {3DNOW}
559 : kIdPfcmpgt, // [ANY] {3DNOW}
560 : kIdPfmax, // [ANY] {3DNOW}
561 : kIdPfmin, // [ANY] {3DNOW}
562 : kIdPfmul, // [ANY] {3DNOW}
563 : kIdPfnacc, // [ANY] {3DNOW2}
564 : kIdPfpnacc, // [ANY] {3DNOW2}
565 : kIdPfrcp, // [ANY] {3DNOW}
566 : kIdPfrcpit1, // [ANY] {3DNOW}
567 : kIdPfrcpit2, // [ANY] {3DNOW}
568 : kIdPfrcpv, // [ANY] {GEODE}
569 : kIdPfrsqit1, // [ANY] {3DNOW}
570 : kIdPfrsqrt, // [ANY] {3DNOW}
571 : kIdPfrsqrtv, // [ANY] {GEODE}
572 : kIdPfsub, // [ANY] {3DNOW}
573 : kIdPfsubr, // [ANY] {3DNOW}
574 : kIdPhaddd, // [ANY] {SSSE3}
575 : kIdPhaddsw, // [ANY] {SSSE3}
576 : kIdPhaddw, // [ANY] {SSSE3}
577 : kIdPhminposuw, // [ANY] {SSE4_1}
578 : kIdPhsubd, // [ANY] {SSSE3}
579 : kIdPhsubsw, // [ANY] {SSSE3}
580 : kIdPhsubw, // [ANY] {SSSE3}
581 : kIdPi2fd, // [ANY] {3DNOW}
582 : kIdPi2fw, // [ANY] {3DNOW2}
583 : kIdPinsrb, // [ANY] {SSE4_1}
584 : kIdPinsrd, // [ANY] {SSE4_1}
585 : kIdPinsrq, // [X64] {SSE4_1}
586 : kIdPinsrw, // [ANY] {MMX2|SSE2}
587 : kIdPmaddubsw, // [ANY] {SSSE3}
588 : kIdPmaddwd, // [ANY] {MMX|SSE2}
589 : kIdPmaxsb, // [ANY] {SSE4_1}
590 : kIdPmaxsd, // [ANY] {SSE4_1}
591 : kIdPmaxsw, // [ANY] {MMX2|SSE2}
592 : kIdPmaxub, // [ANY] {MMX2|SSE2}
593 : kIdPmaxud, // [ANY] {SSE4_1}
594 : kIdPmaxuw, // [ANY] {SSE4_1}
595 : kIdPminsb, // [ANY] {SSE4_1}
596 : kIdPminsd, // [ANY] {SSE4_1}
597 : kIdPminsw, // [ANY] {MMX2|SSE2}
598 : kIdPminub, // [ANY] {MMX2|SSE2}
599 : kIdPminud, // [ANY] {SSE4_1}
600 : kIdPminuw, // [ANY] {SSE4_1}
601 : kIdPmovmskb, // [ANY] {MMX2|SSE2}
602 : kIdPmovsxbd, // [ANY] {SSE4_1}
603 : kIdPmovsxbq, // [ANY] {SSE4_1}
604 : kIdPmovsxbw, // [ANY] {SSE4_1}
605 : kIdPmovsxdq, // [ANY] {SSE4_1}
606 : kIdPmovsxwd, // [ANY] {SSE4_1}
607 : kIdPmovsxwq, // [ANY] {SSE4_1}
608 : kIdPmovzxbd, // [ANY] {SSE4_1}
609 : kIdPmovzxbq, // [ANY] {SSE4_1}
610 : kIdPmovzxbw, // [ANY] {SSE4_1}
611 : kIdPmovzxdq, // [ANY] {SSE4_1}
612 : kIdPmovzxwd, // [ANY] {SSE4_1}
613 : kIdPmovzxwq, // [ANY] {SSE4_1}
614 : kIdPmuldq, // [ANY] {SSE4_1}
615 : kIdPmulhrsw, // [ANY] {SSSE3}
616 : kIdPmulhrw, // [ANY] {3DNOW}
617 : kIdPmulhuw, // [ANY] {MMX2|SSE2}
618 : kIdPmulhw, // [ANY] {MMX|SSE2}
619 : kIdPmulld, // [ANY] {SSE4_1}
620 : kIdPmullw, // [ANY] {MMX|SSE2}
621 : kIdPmuludq, // [ANY] {SSE2}
622 : kIdPop, // [ANY]
623 : kIdPopa, // [X86]
624 : kIdPopad, // [X86]
625 : kIdPopcnt, // [ANY] {POPCNT}
626 : kIdPopf, // [ANY]
627 : kIdPopfd, // [X86]
628 : kIdPopfq, // [X64]
629 : kIdPor, // [ANY] {MMX|SSE2}
630 : kIdPrefetch, // [ANY] {3DNOW}
631 : kIdPrefetchnta, // [ANY] {MMX2}
632 : kIdPrefetcht0, // [ANY] {MMX2}
633 : kIdPrefetcht1, // [ANY] {MMX2}
634 : kIdPrefetcht2, // [ANY] {MMX2}
635 : kIdPrefetchw, // [ANY] {PREFETCHW}
636 : kIdPrefetchwt1, // [ANY] {PREFETCHWT1}
637 : kIdPsadbw, // [ANY] {MMX2|SSE2}
638 : kIdPshufb, // [ANY] {SSSE3}
639 : kIdPshufd, // [ANY] {SSE2}
640 : kIdPshufhw, // [ANY] {SSE2}
641 : kIdPshuflw, // [ANY] {SSE2}
642 : kIdPshufw, // [ANY] {MMX2}
643 : kIdPsignb, // [ANY] {SSSE3}
644 : kIdPsignd, // [ANY] {SSSE3}
645 : kIdPsignw, // [ANY] {SSSE3}
646 : kIdPslld, // [ANY] {MMX|SSE2}
647 : kIdPslldq, // [ANY] {SSE2}
648 : kIdPsllq, // [ANY] {MMX|SSE2}
649 : kIdPsllw, // [ANY] {MMX|SSE2}
650 : kIdPsrad, // [ANY] {MMX|SSE2}
651 : kIdPsraw, // [ANY] {MMX|SSE2}
652 : kIdPsrld, // [ANY] {MMX|SSE2}
653 : kIdPsrldq, // [ANY] {SSE2}
654 : kIdPsrlq, // [ANY] {MMX|SSE2}
655 : kIdPsrlw, // [ANY] {MMX|SSE2}
656 : kIdPsubb, // [ANY] {MMX|SSE2}
657 : kIdPsubd, // [ANY] {MMX|SSE2}
658 : kIdPsubq, // [ANY] {SSE2}
659 : kIdPsubsb, // [ANY] {MMX|SSE2}
660 : kIdPsubsw, // [ANY] {MMX|SSE2}
661 : kIdPsubusb, // [ANY] {MMX|SSE2}
662 : kIdPsubusw, // [ANY] {MMX|SSE2}
663 : kIdPsubw, // [ANY] {MMX|SSE2}
664 : kIdPswapd, // [ANY] {3DNOW2}
665 : kIdPtest, // [ANY] {SSE4_1}
666 : kIdPunpckhbw, // [ANY] {MMX|SSE2}
667 : kIdPunpckhdq, // [ANY] {MMX|SSE2}
668 : kIdPunpckhqdq, // [ANY] {SSE2}
669 : kIdPunpckhwd, // [ANY] {MMX|SSE2}
670 : kIdPunpcklbw, // [ANY] {MMX|SSE2}
671 : kIdPunpckldq, // [ANY] {MMX|SSE2}
672 : kIdPunpcklqdq, // [ANY] {SSE2}
673 : kIdPunpcklwd, // [ANY] {MMX|SSE2}
674 : kIdPush, // [ANY]
675 : kIdPusha, // [X86]
676 : kIdPushad, // [X86]
677 : kIdPushf, // [ANY]
678 : kIdPushfd, // [X86]
679 : kIdPushfq, // [X64]
680 : kIdPxor, // [ANY] {MMX|SSE2}
681 : kIdRcl, // [ANY]
682 : kIdRcpps, // [ANY] {SSE}
683 : kIdRcpss, // [ANY] {SSE}
684 : kIdRcr, // [ANY]
685 : kIdRdfsbase, // [X64] {FSGSBASE}
686 : kIdRdgsbase, // [X64] {FSGSBASE}
687 : kIdRdmsr, // [ANY] {MSR}
688 : kIdRdpmc, // [ANY]
689 : kIdRdrand, // [ANY] {RDRAND}
690 : kIdRdseed, // [ANY] {RDSEED}
691 : kIdRdtsc, // [ANY] {RDTSC}
692 : kIdRdtscp, // [ANY] {RDTSCP}
693 : kIdRet, // [ANY]
694 : kIdRol, // [ANY]
695 : kIdRor, // [ANY]
696 : kIdRorx, // [ANY] {BMI2}
697 : kIdRoundpd, // [ANY] {SSE4_1}
698 : kIdRoundps, // [ANY] {SSE4_1}
699 : kIdRoundsd, // [ANY] {SSE4_1}
700 : kIdRoundss, // [ANY] {SSE4_1}
701 : kIdRsm, // [X86]
702 : kIdRsqrtps, // [ANY] {SSE}
703 : kIdRsqrtss, // [ANY] {SSE}
704 : kIdSahf, // [ANY] {LAHFSAHF}
705 : kIdSal, // [ANY]
706 : kIdSar, // [ANY]
707 : kIdSarx, // [ANY] {BMI2}
708 : kIdSbb, // [ANY]
709 : kIdScas, // [ANY]
710 : kIdSeta, // [ANY]
711 : kIdSetae, // [ANY]
712 : kIdSetb, // [ANY]
713 : kIdSetbe, // [ANY]
714 : kIdSetc, // [ANY]
715 : kIdSete, // [ANY]
716 : kIdSetg, // [ANY]
717 : kIdSetge, // [ANY]
718 : kIdSetl, // [ANY]
719 : kIdSetle, // [ANY]
720 : kIdSetna, // [ANY]
721 : kIdSetnae, // [ANY]
722 : kIdSetnb, // [ANY]
723 : kIdSetnbe, // [ANY]
724 : kIdSetnc, // [ANY]
725 : kIdSetne, // [ANY]
726 : kIdSetng, // [ANY]
727 : kIdSetnge, // [ANY]
728 : kIdSetnl, // [ANY]
729 : kIdSetnle, // [ANY]
730 : kIdSetno, // [ANY]
731 : kIdSetnp, // [ANY]
732 : kIdSetns, // [ANY]
733 : kIdSetnz, // [ANY]
734 : kIdSeto, // [ANY]
735 : kIdSetp, // [ANY]
736 : kIdSetpe, // [ANY]
737 : kIdSetpo, // [ANY]
738 : kIdSets, // [ANY]
739 : kIdSetz, // [ANY]
740 : kIdSfence, // [ANY] {MMX2}
741 : kIdSgdt, // [ANY]
742 : kIdSha1msg1, // [ANY] {SHA}
743 : kIdSha1msg2, // [ANY] {SHA}
744 : kIdSha1nexte, // [ANY] {SHA}
745 : kIdSha1rnds4, // [ANY] {SHA}
746 : kIdSha256msg1, // [ANY] {SHA}
747 : kIdSha256msg2, // [ANY] {SHA}
748 : kIdSha256rnds2, // [ANY] {SHA}
749 : kIdShl, // [ANY]
750 : kIdShld, // [ANY]
751 : kIdShlx, // [ANY] {BMI2}
752 : kIdShr, // [ANY]
753 : kIdShrd, // [ANY]
754 : kIdShrx, // [ANY] {BMI2}
755 : kIdShufpd, // [ANY] {SSE2}
756 : kIdShufps, // [ANY] {SSE}
757 : kIdSidt, // [ANY]
758 : kIdSldt, // [ANY]
759 : kIdSmsw, // [ANY]
760 : kIdSqrtpd, // [ANY] {SSE2}
761 : kIdSqrtps, // [ANY] {SSE}
762 : kIdSqrtsd, // [ANY] {SSE2}
763 : kIdSqrtss, // [ANY] {SSE}
764 : kIdStac, // [ANY] {SMAP}
765 : kIdStc, // [ANY]
766 : kIdStd, // [ANY]
767 : kIdSti, // [ANY]
768 : kIdStmxcsr, // [ANY] {SSE}
769 : kIdStos, // [ANY]
770 : kIdStr, // [ANY]
771 : kIdSub, // [ANY]
772 : kIdSubpd, // [ANY] {SSE2}
773 : kIdSubps, // [ANY] {SSE}
774 : kIdSubsd, // [ANY] {SSE2}
775 : kIdSubss, // [ANY] {SSE}
776 : kIdSwapgs, // [X64]
777 : kIdSyscall, // [X64]
778 : kIdSysenter, // [ANY]
779 : kIdSysexit, // [ANY]
780 : kIdSysexit64, // [ANY]
781 : kIdSysret, // [X64]
782 : kIdSysret64, // [X64]
783 : kIdT1mskc, // [ANY] {TBM}
784 : kIdTest, // [ANY]
785 : kIdTzcnt, // [ANY] {BMI}
786 : kIdTzmsk, // [ANY] {TBM}
787 : kIdUcomisd, // [ANY] {SSE2}
788 : kIdUcomiss, // [ANY] {SSE}
789 : kIdUd2, // [ANY]
790 : kIdUnpckhpd, // [ANY] {SSE2}
791 : kIdUnpckhps, // [ANY] {SSE}
792 : kIdUnpcklpd, // [ANY] {SSE2}
793 : kIdUnpcklps, // [ANY] {SSE}
794 : kIdV4fmaddps, // [ANY] {AVX512_4FMAPS}
795 : kIdV4fnmaddps, // [ANY] {AVX512_4FMAPS}
796 : kIdVaddpd, // [ANY] {AVX|AVX512_F+VL}
797 : kIdVaddps, // [ANY] {AVX|AVX512_F+VL}
798 : kIdVaddsd, // [ANY] {AVX|AVX512_F}
799 : kIdVaddss, // [ANY] {AVX|AVX512_F}
800 : kIdVaddsubpd, // [ANY] {AVX}
801 : kIdVaddsubps, // [ANY] {AVX}
802 : kIdVaesdec, // [ANY] {AESNI|AVX}
803 : kIdVaesdeclast, // [ANY] {AESNI|AVX}
804 : kIdVaesenc, // [ANY] {AESNI|AVX}
805 : kIdVaesenclast, // [ANY] {AESNI|AVX}
806 : kIdVaesimc, // [ANY] {AESNI|AVX}
807 : kIdVaeskeygenassist, // [ANY] {AESNI|AVX}
808 : kIdValignd, // [ANY] {AVX512_F+VL}
809 : kIdValignq, // [ANY] {AVX512_F+VL}
810 : kIdVandnpd, // [ANY] {AVX|AVX512_DQ+VL}
811 : kIdVandnps, // [ANY] {AVX|AVX512_DQ+VL}
812 : kIdVandpd, // [ANY] {AVX|AVX512_DQ+VL}
813 : kIdVandps, // [ANY] {AVX|AVX512_DQ+VL}
814 : kIdVblendmb, // [ANY] {AVX512_BW+VL}
815 : kIdVblendmd, // [ANY] {AVX512_F+VL}
816 : kIdVblendmpd, // [ANY] {AVX512_F+VL}
817 : kIdVblendmps, // [ANY] {AVX512_F+VL}
818 : kIdVblendmq, // [ANY] {AVX512_F+VL}
819 : kIdVblendmw, // [ANY] {AVX512_BW+VL}
820 : kIdVblendpd, // [ANY] {AVX}
821 : kIdVblendps, // [ANY] {AVX}
822 : kIdVblendvpd, // [ANY] {AVX}
823 : kIdVblendvps, // [ANY] {AVX}
824 : kIdVbroadcastf128, // [ANY] {AVX}
825 : kIdVbroadcastf32x2, // [ANY] {AVX512_DQ+VL}
826 : kIdVbroadcastf32x4, // [ANY] {AVX512_F}
827 : kIdVbroadcastf32x8, // [ANY] {AVX512_DQ}
828 : kIdVbroadcastf64x2, // [ANY] {AVX512_DQ+VL}
829 : kIdVbroadcastf64x4, // [ANY] {AVX512_F}
830 : kIdVbroadcasti128, // [ANY] {AVX2}
831 : kIdVbroadcasti32x2, // [ANY] {AVX512_DQ+VL}
832 : kIdVbroadcasti32x4, // [ANY] {AVX512_F+VL}
833 : kIdVbroadcasti32x8, // [ANY] {AVX512_DQ}
834 : kIdVbroadcasti64x2, // [ANY] {AVX512_DQ+VL}
835 : kIdVbroadcasti64x4, // [ANY] {AVX512_F}
836 : kIdVbroadcastsd, // [ANY] {AVX|AVX2|AVX512_F+VL}
837 : kIdVbroadcastss, // [ANY] {AVX|AVX2|AVX512_F+VL}
838 : kIdVcmppd, // [ANY] {AVX|AVX512_F+VL}
839 : kIdVcmpps, // [ANY] {AVX|AVX512_F+VL}
840 : kIdVcmpsd, // [ANY] {AVX|AVX512_F}
841 : kIdVcmpss, // [ANY] {AVX|AVX512_F}
842 : kIdVcomisd, // [ANY] {AVX|AVX512_F}
843 : kIdVcomiss, // [ANY] {AVX|AVX512_F}
844 : kIdVcompresspd, // [ANY] {AVX512_F+VL}
845 : kIdVcompressps, // [ANY] {AVX512_F+VL}
846 : kIdVcvtdq2pd, // [ANY] {AVX|AVX512_F+VL}
847 : kIdVcvtdq2ps, // [ANY] {AVX|AVX512_F+VL}
848 : kIdVcvtpd2dq, // [ANY] {AVX|AVX512_F+VL}
849 : kIdVcvtpd2ps, // [ANY] {AVX|AVX512_F+VL}
850 : kIdVcvtpd2qq, // [ANY] {AVX512_DQ+VL}
851 : kIdVcvtpd2udq, // [ANY] {AVX512_F+VL}
852 : kIdVcvtpd2uqq, // [ANY] {AVX512_DQ+VL}
853 : kIdVcvtph2ps, // [ANY] {AVX512_F|F16C+VL}
854 : kIdVcvtps2dq, // [ANY] {AVX|AVX512_F+VL}
855 : kIdVcvtps2pd, // [ANY] {AVX|AVX512_F+VL}
856 : kIdVcvtps2ph, // [ANY] {AVX512_F|F16C+VL}
857 : kIdVcvtps2qq, // [ANY] {AVX512_DQ+VL}
858 : kIdVcvtps2udq, // [ANY] {AVX512_F+VL}
859 : kIdVcvtps2uqq, // [ANY] {AVX512_DQ+VL}
860 : kIdVcvtqq2pd, // [ANY] {AVX512_DQ+VL}
861 : kIdVcvtqq2ps, // [ANY] {AVX512_DQ+VL}
862 : kIdVcvtsd2si, // [ANY] {AVX|AVX512_F}
863 : kIdVcvtsd2ss, // [ANY] {AVX|AVX512_F}
864 : kIdVcvtsd2usi, // [ANY] {AVX512_F}
865 : kIdVcvtsi2sd, // [ANY] {AVX|AVX512_F}
866 : kIdVcvtsi2ss, // [ANY] {AVX|AVX512_F}
867 : kIdVcvtss2sd, // [ANY] {AVX|AVX512_F}
868 : kIdVcvtss2si, // [ANY] {AVX|AVX512_F}
869 : kIdVcvtss2usi, // [ANY] {AVX512_F}
870 : kIdVcvttpd2dq, // [ANY] {AVX|AVX512_F+VL}
871 : kIdVcvttpd2qq, // [ANY] {AVX512_F+VL}
872 : kIdVcvttpd2udq, // [ANY] {AVX512_F+VL}
873 : kIdVcvttpd2uqq, // [ANY] {AVX512_DQ+VL}
874 : kIdVcvttps2dq, // [ANY] {AVX|AVX512_F+VL}
875 : kIdVcvttps2qq, // [ANY] {AVX512_DQ+VL}
876 : kIdVcvttps2udq, // [ANY] {AVX512_F+VL}
877 : kIdVcvttps2uqq, // [ANY] {AVX512_DQ+VL}
878 : kIdVcvttsd2si, // [ANY] {AVX|AVX512_F}
879 : kIdVcvttsd2usi, // [ANY] {AVX512_F}
880 : kIdVcvttss2si, // [ANY] {AVX|AVX512_F}
881 : kIdVcvttss2usi, // [ANY] {AVX512_F}
882 : kIdVcvtudq2pd, // [ANY] {AVX512_F+VL}
883 : kIdVcvtudq2ps, // [ANY] {AVX512_F+VL}
884 : kIdVcvtuqq2pd, // [ANY] {AVX512_DQ+VL}
885 : kIdVcvtuqq2ps, // [ANY] {AVX512_DQ+VL}
886 : kIdVcvtusi2sd, // [ANY] {AVX512_F}
887 : kIdVcvtusi2ss, // [ANY] {AVX512_F}
888 : kIdVdbpsadbw, // [ANY] {AVX512_BW+VL}
889 : kIdVdivpd, // [ANY] {AVX|AVX512_F+VL}
890 : kIdVdivps, // [ANY] {AVX|AVX512_F+VL}
891 : kIdVdivsd, // [ANY] {AVX|AVX512_F}
892 : kIdVdivss, // [ANY] {AVX|AVX512_F}
893 : kIdVdppd, // [ANY] {AVX}
894 : kIdVdpps, // [ANY] {AVX}
895 : kIdVerr, // [ANY]
896 : kIdVerw, // [ANY]
897 : kIdVexp2pd, // [ANY] {AVX512_ERI}
898 : kIdVexp2ps, // [ANY] {AVX512_ERI}
899 : kIdVexpandpd, // [ANY] {AVX512_F+VL}
900 : kIdVexpandps, // [ANY] {AVX512_F+VL}
901 : kIdVextractf128, // [ANY] {AVX}
902 : kIdVextractf32x4, // [ANY] {AVX512_F+VL}
903 : kIdVextractf32x8, // [ANY] {AVX512_DQ}
904 : kIdVextractf64x2, // [ANY] {AVX512_DQ+VL}
905 : kIdVextractf64x4, // [ANY] {AVX512_F}
906 : kIdVextracti128, // [ANY] {AVX2}
907 : kIdVextracti32x4, // [ANY] {AVX512_F+VL}
908 : kIdVextracti32x8, // [ANY] {AVX512_DQ}
909 : kIdVextracti64x2, // [ANY] {AVX512_DQ+VL}
910 : kIdVextracti64x4, // [ANY] {AVX512_F}
911 : kIdVextractps, // [ANY] {AVX|AVX512_F}
912 : kIdVfixupimmpd, // [ANY] {AVX512_F+VL}
913 : kIdVfixupimmps, // [ANY] {AVX512_F+VL}
914 : kIdVfixupimmsd, // [ANY] {AVX512_F}
915 : kIdVfixupimmss, // [ANY] {AVX512_F}
916 : kIdVfmadd132pd, // [ANY] {AVX512_F|FMA+VL}
917 : kIdVfmadd132ps, // [ANY] {AVX512_F|FMA+VL}
918 : kIdVfmadd132sd, // [ANY] {AVX512_F|FMA}
919 : kIdVfmadd132ss, // [ANY] {AVX512_F|FMA}
920 : kIdVfmadd213pd, // [ANY] {AVX512_F|FMA+VL}
921 : kIdVfmadd213ps, // [ANY] {AVX512_F|FMA+VL}
922 : kIdVfmadd213sd, // [ANY] {AVX512_F|FMA}
923 : kIdVfmadd213ss, // [ANY] {AVX512_F|FMA}
924 : kIdVfmadd231pd, // [ANY] {AVX512_F|FMA+VL}
925 : kIdVfmadd231ps, // [ANY] {AVX512_F|FMA+VL}
926 : kIdVfmadd231sd, // [ANY] {AVX512_F|FMA}
927 : kIdVfmadd231ss, // [ANY] {AVX512_F|FMA}
928 : kIdVfmaddpd, // [ANY] {FMA4}
929 : kIdVfmaddps, // [ANY] {FMA4}
930 : kIdVfmaddsd, // [ANY] {FMA4}
931 : kIdVfmaddss, // [ANY] {FMA4}
932 : kIdVfmaddsub132pd, // [ANY] {AVX512_F|FMA+VL}
933 : kIdVfmaddsub132ps, // [ANY] {AVX512_F|FMA+VL}
934 : kIdVfmaddsub213pd, // [ANY] {AVX512_F|FMA+VL}
935 : kIdVfmaddsub213ps, // [ANY] {AVX512_F|FMA+VL}
936 : kIdVfmaddsub231pd, // [ANY] {AVX512_F|FMA+VL}
937 : kIdVfmaddsub231ps, // [ANY] {AVX512_F|FMA+VL}
938 : kIdVfmaddsubpd, // [ANY] {FMA4}
939 : kIdVfmaddsubps, // [ANY] {FMA4}
940 : kIdVfmsub132pd, // [ANY] {AVX512_F|FMA+VL}
941 : kIdVfmsub132ps, // [ANY] {AVX512_F|FMA+VL}
942 : kIdVfmsub132sd, // [ANY] {AVX512_F|FMA}
943 : kIdVfmsub132ss, // [ANY] {AVX512_F|FMA}
944 : kIdVfmsub213pd, // [ANY] {AVX512_F|FMA+VL}
945 : kIdVfmsub213ps, // [ANY] {AVX512_F|FMA+VL}
946 : kIdVfmsub213sd, // [ANY] {AVX512_F|FMA}
947 : kIdVfmsub213ss, // [ANY] {AVX512_F|FMA}
948 : kIdVfmsub231pd, // [ANY] {AVX512_F|FMA+VL}
949 : kIdVfmsub231ps, // [ANY] {AVX512_F|FMA+VL}
950 : kIdVfmsub231sd, // [ANY] {AVX512_F|FMA}
951 : kIdVfmsub231ss, // [ANY] {AVX512_F|FMA}
952 : kIdVfmsubadd132pd, // [ANY] {AVX512_F|FMA+VL}
953 : kIdVfmsubadd132ps, // [ANY] {AVX512_F|FMA+VL}
954 : kIdVfmsubadd213pd, // [ANY] {AVX512_F|FMA+VL}
955 : kIdVfmsubadd213ps, // [ANY] {AVX512_F|FMA+VL}
956 : kIdVfmsubadd231pd, // [ANY] {AVX512_F|FMA+VL}
957 : kIdVfmsubadd231ps, // [ANY] {AVX512_F|FMA+VL}
958 : kIdVfmsubaddpd, // [ANY] {FMA4}
959 : kIdVfmsubaddps, // [ANY] {FMA4}
960 : kIdVfmsubpd, // [ANY] {FMA4}
961 : kIdVfmsubps, // [ANY] {FMA4}
962 : kIdVfmsubsd, // [ANY] {FMA4}
963 : kIdVfmsubss, // [ANY] {FMA4}
964 : kIdVfnmadd132pd, // [ANY] {AVX512_F|FMA+VL}
965 : kIdVfnmadd132ps, // [ANY] {AVX512_F|FMA+VL}
966 : kIdVfnmadd132sd, // [ANY] {AVX512_F|FMA}
967 : kIdVfnmadd132ss, // [ANY] {AVX512_F|FMA}
968 : kIdVfnmadd213pd, // [ANY] {AVX512_F|FMA+VL}
969 : kIdVfnmadd213ps, // [ANY] {AVX512_F|FMA+VL}
970 : kIdVfnmadd213sd, // [ANY] {AVX512_F|FMA}
971 : kIdVfnmadd213ss, // [ANY] {AVX512_F|FMA}
972 : kIdVfnmadd231pd, // [ANY] {AVX512_F|FMA+VL}
973 : kIdVfnmadd231ps, // [ANY] {AVX512_F|FMA+VL}
974 : kIdVfnmadd231sd, // [ANY] {AVX512_F|FMA}
975 : kIdVfnmadd231ss, // [ANY] {AVX512_F|FMA}
976 : kIdVfnmaddpd, // [ANY] {FMA4}
977 : kIdVfnmaddps, // [ANY] {FMA4}
978 : kIdVfnmaddsd, // [ANY] {FMA4}
979 : kIdVfnmaddss, // [ANY] {FMA4}
980 : kIdVfnmsub132pd, // [ANY] {AVX512_F|FMA+VL}
981 : kIdVfnmsub132ps, // [ANY] {AVX512_F|FMA+VL}
982 : kIdVfnmsub132sd, // [ANY] {AVX512_F|FMA}
983 : kIdVfnmsub132ss, // [ANY] {AVX512_F|FMA}
984 : kIdVfnmsub213pd, // [ANY] {AVX512_F|FMA+VL}
985 : kIdVfnmsub213ps, // [ANY] {AVX512_F|FMA+VL}
986 : kIdVfnmsub213sd, // [ANY] {AVX512_F|FMA}
987 : kIdVfnmsub213ss, // [ANY] {AVX512_F|FMA}
988 : kIdVfnmsub231pd, // [ANY] {AVX512_F|FMA+VL}
989 : kIdVfnmsub231ps, // [ANY] {AVX512_F|FMA+VL}
990 : kIdVfnmsub231sd, // [ANY] {AVX512_F|FMA}
991 : kIdVfnmsub231ss, // [ANY] {AVX512_F|FMA}
992 : kIdVfnmsubpd, // [ANY] {FMA4}
993 : kIdVfnmsubps, // [ANY] {FMA4}
994 : kIdVfnmsubsd, // [ANY] {FMA4}
995 : kIdVfnmsubss, // [ANY] {FMA4}
996 : kIdVfpclasspd, // [ANY] {AVX512_DQ+VL}
997 : kIdVfpclassps, // [ANY] {AVX512_DQ+VL}
998 : kIdVfpclasssd, // [ANY] {AVX512_DQ}
999 : kIdVfpclassss, // [ANY] {AVX512_DQ}
1000 : kIdVfrczpd, // [ANY] {XOP}
1001 : kIdVfrczps, // [ANY] {XOP}
1002 : kIdVfrczsd, // [ANY] {XOP}
1003 : kIdVfrczss, // [ANY] {XOP}
1004 : kIdVgatherdpd, // [ANY] {AVX2|AVX512_F+VL}
1005 : kIdVgatherdps, // [ANY] {AVX2|AVX512_F+VL}
1006 : kIdVgatherpf0dpd, // [ANY] {AVX512_PFI}
1007 : kIdVgatherpf0dps, // [ANY] {AVX512_PFI}
1008 : kIdVgatherpf0qpd, // [ANY] {AVX512_PFI}
1009 : kIdVgatherpf0qps, // [ANY] {AVX512_PFI}
1010 : kIdVgatherpf1dpd, // [ANY] {AVX512_PFI}
1011 : kIdVgatherpf1dps, // [ANY] {AVX512_PFI}
1012 : kIdVgatherpf1qpd, // [ANY] {AVX512_PFI}
1013 : kIdVgatherpf1qps, // [ANY] {AVX512_PFI}
1014 : kIdVgatherqpd, // [ANY] {AVX2|AVX512_F+VL}
1015 : kIdVgatherqps, // [ANY] {AVX2|AVX512_F+VL}
1016 : kIdVgetexppd, // [ANY] {AVX512_F+VL}
1017 : kIdVgetexpps, // [ANY] {AVX512_F+VL}
1018 : kIdVgetexpsd, // [ANY] {AVX512_F}
1019 : kIdVgetexpss, // [ANY] {AVX512_F}
1020 : kIdVgetmantpd, // [ANY] {AVX512_F+VL}
1021 : kIdVgetmantps, // [ANY] {AVX512_F+VL}
1022 : kIdVgetmantsd, // [ANY] {AVX512_F}
1023 : kIdVgetmantss, // [ANY] {AVX512_F}
1024 : kIdVhaddpd, // [ANY] {AVX}
1025 : kIdVhaddps, // [ANY] {AVX}
1026 : kIdVhsubpd, // [ANY] {AVX}
1027 : kIdVhsubps, // [ANY] {AVX}
1028 : kIdVinsertf128, // [ANY] {AVX}
1029 : kIdVinsertf32x4, // [ANY] {AVX512_F+VL}
1030 : kIdVinsertf32x8, // [ANY] {AVX512_DQ}
1031 : kIdVinsertf64x2, // [ANY] {AVX512_DQ+VL}
1032 : kIdVinsertf64x4, // [ANY] {AVX512_F}
1033 : kIdVinserti128, // [ANY] {AVX2}
1034 : kIdVinserti32x4, // [ANY] {AVX512_F+VL}
1035 : kIdVinserti32x8, // [ANY] {AVX512_DQ}
1036 : kIdVinserti64x2, // [ANY] {AVX512_DQ+VL}
1037 : kIdVinserti64x4, // [ANY] {AVX512_F}
1038 : kIdVinsertps, // [ANY] {AVX|AVX512_F}
1039 : kIdVlddqu, // [ANY] {AVX}
1040 : kIdVldmxcsr, // [ANY] {AVX}
1041 : kIdVmaskmovdqu, // [ANY] {AVX}
1042 : kIdVmaskmovpd, // [ANY] {AVX}
1043 : kIdVmaskmovps, // [ANY] {AVX}
1044 : kIdVmaxpd, // [ANY] {AVX|AVX512_F+VL}
1045 : kIdVmaxps, // [ANY] {AVX|AVX512_F+VL}
1046 : kIdVmaxsd, // [ANY] {AVX|AVX512_F+VL}
1047 : kIdVmaxss, // [ANY] {AVX|AVX512_F+VL}
1048 : kIdVminpd, // [ANY] {AVX|AVX512_F+VL}
1049 : kIdVminps, // [ANY] {AVX|AVX512_F+VL}
1050 : kIdVminsd, // [ANY] {AVX|AVX512_F+VL}
1051 : kIdVminss, // [ANY] {AVX|AVX512_F+VL}
1052 : kIdVmovapd, // [ANY] {AVX|AVX512_F+VL}
1053 : kIdVmovaps, // [ANY] {AVX|AVX512_F+VL}
1054 : kIdVmovd, // [ANY] {AVX|AVX512_F}
1055 : kIdVmovddup, // [ANY] {AVX|AVX512_F+VL}
1056 : kIdVmovdqa, // [ANY] {AVX}
1057 : kIdVmovdqa32, // [ANY] {AVX512_F+VL}
1058 : kIdVmovdqa64, // [ANY] {AVX512_F+VL}
1059 : kIdVmovdqu, // [ANY] {AVX}
1060 : kIdVmovdqu16, // [ANY] {AVX512_BW+VL}
1061 : kIdVmovdqu32, // [ANY] {AVX512_F+VL}
1062 : kIdVmovdqu64, // [ANY] {AVX512_F+VL}
1063 : kIdVmovdqu8, // [ANY] {AVX512_BW+VL}
1064 : kIdVmovhlps, // [ANY] {AVX|AVX512_F}
1065 : kIdVmovhpd, // [ANY] {AVX|AVX512_F}
1066 : kIdVmovhps, // [ANY] {AVX|AVX512_F}
1067 : kIdVmovlhps, // [ANY] {AVX|AVX512_F}
1068 : kIdVmovlpd, // [ANY] {AVX|AVX512_F}
1069 : kIdVmovlps, // [ANY] {AVX|AVX512_F}
1070 : kIdVmovmskpd, // [ANY] {AVX}
1071 : kIdVmovmskps, // [ANY] {AVX}
1072 : kIdVmovntdq, // [ANY] {AVX|AVX512_F+VL}
1073 : kIdVmovntdqa, // [ANY] {AVX|AVX2|AVX512_F+VL}
1074 : kIdVmovntpd, // [ANY] {AVX|AVX512_F+VL}
1075 : kIdVmovntps, // [ANY] {AVX|AVX512_F+VL}
1076 : kIdVmovq, // [ANY] {AVX|AVX512_F}
1077 : kIdVmovsd, // [ANY] {AVX|AVX512_F}
1078 : kIdVmovshdup, // [ANY] {AVX|AVX512_F+VL}
1079 : kIdVmovsldup, // [ANY] {AVX|AVX512_F+VL}
1080 : kIdVmovss, // [ANY] {AVX|AVX512_F}
1081 : kIdVmovupd, // [ANY] {AVX|AVX512_F+VL}
1082 : kIdVmovups, // [ANY] {AVX|AVX512_F+VL}
1083 : kIdVmpsadbw, // [ANY] {AVX|AVX2}
1084 : kIdVmulpd, // [ANY] {AVX|AVX512_F+VL}
1085 : kIdVmulps, // [ANY] {AVX|AVX512_F+VL}
1086 : kIdVmulsd, // [ANY] {AVX|AVX512_F}
1087 : kIdVmulss, // [ANY] {AVX|AVX512_F}
1088 : kIdVorpd, // [ANY] {AVX|AVX512_DQ+VL}
1089 : kIdVorps, // [ANY] {AVX|AVX512_F+VL}
1090 : kIdVp4dpwssd, // [ANY] {AVX512_4VNNIW}
1091 : kIdVp4dpwssds, // [ANY] {AVX512_4VNNIW}
1092 : kIdVpabsb, // [ANY] {AVX|AVX2|AVX512_BW+VL}
1093 : kIdVpabsd, // [ANY] {AVX|AVX2|AVX512_F+VL}
1094 : kIdVpabsq, // [ANY] {AVX512_F+VL}
1095 : kIdVpabsw, // [ANY] {AVX|AVX2|AVX512_BW+VL}
1096 : kIdVpackssdw, // [ANY] {AVX|AVX2|AVX512_BW+VL}
1097 : kIdVpacksswb, // [ANY] {AVX|AVX2|AVX512_BW+VL}
1098 : kIdVpackusdw, // [ANY] {AVX|AVX2|AVX512_BW+VL}
1099 : kIdVpackuswb, // [ANY] {AVX|AVX2|AVX512_BW+VL}
1100 : kIdVpaddb, // [ANY] {AVX|AVX2|AVX512_BW+VL}
1101 : kIdVpaddd, // [ANY] {AVX|AVX2|AVX512_F+VL}
1102 : kIdVpaddq, // [ANY] {AVX|AVX2|AVX512_F+VL}
1103 : kIdVpaddsb, // [ANY] {AVX|AVX2|AVX512_BW+VL}
1104 : kIdVpaddsw, // [ANY] {AVX|AVX2|AVX512_BW+VL}
1105 : kIdVpaddusb, // [ANY] {AVX|AVX2|AVX512_BW+VL}
1106 : kIdVpaddusw, // [ANY] {AVX|AVX2|AVX512_BW+VL}
1107 : kIdVpaddw, // [ANY] {AVX|AVX2|AVX512_BW+VL}
1108 : kIdVpalignr, // [ANY] {AVX|AVX2|AVX512_BW+VL}
1109 : kIdVpand, // [ANY] {AVX|AVX2}
1110 : kIdVpandd, // [ANY] {AVX512_F+VL}
1111 : kIdVpandn, // [ANY] {AVX|AVX2}
1112 : kIdVpandnd, // [ANY] {AVX512_F+VL}
1113 : kIdVpandnq, // [ANY] {AVX512_F+VL}
1114 : kIdVpandq, // [ANY] {AVX512_F+VL}
1115 : kIdVpavgb, // [ANY] {AVX|AVX2|AVX512_BW+VL}
1116 : kIdVpavgw, // [ANY] {AVX|AVX2|AVX512_BW+VL}
1117 : kIdVpblendd, // [ANY] {AVX2}
1118 : kIdVpblendvb, // [ANY] {AVX|AVX2}
1119 : kIdVpblendw, // [ANY] {AVX|AVX2}
1120 : kIdVpbroadcastb, // [ANY] {AVX2|AVX512_BW+VL}
1121 : kIdVpbroadcastd, // [ANY] {AVX2|AVX512_F+VL}
1122 : kIdVpbroadcastmb2d, // [ANY] {AVX512_CDI+VL}
1123 : kIdVpbroadcastmb2q, // [ANY] {AVX512_CDI+VL}
1124 : kIdVpbroadcastq, // [ANY] {AVX2|AVX512_F+VL}
1125 : kIdVpbroadcastw, // [ANY] {AVX2|AVX512_BW+VL}
1126 : kIdVpclmulqdq, // [ANY] {AVX|PCLMULQDQ}
1127 : kIdVpcmov, // [ANY] {XOP}
1128 : kIdVpcmpb, // [ANY] {AVX512_BW+VL}
1129 : kIdVpcmpd, // [ANY] {AVX512_F+VL}
1130 : kIdVpcmpeqb, // [ANY] {AVX|AVX2|AVX512_BW+VL}
1131 : kIdVpcmpeqd, // [ANY] {AVX|AVX2|AVX512_F+VL}
1132 : kIdVpcmpeqq, // [ANY] {AVX|AVX2|AVX512_F+VL}
1133 : kIdVpcmpeqw, // [ANY] {AVX|AVX2|AVX512_BW+VL}
1134 : kIdVpcmpestri, // [ANY] {AVX}
1135 : kIdVpcmpestrm, // [ANY] {AVX}
1136 : kIdVpcmpgtb, // [ANY] {AVX|AVX2|AVX512_BW+VL}
1137 : kIdVpcmpgtd, // [ANY] {AVX|AVX2|AVX512_F+VL}
1138 : kIdVpcmpgtq, // [ANY] {AVX|AVX2|AVX512_F+VL}
1139 : kIdVpcmpgtw, // [ANY] {AVX|AVX2|AVX512_BW+VL}
1140 : kIdVpcmpistri, // [ANY] {AVX}
1141 : kIdVpcmpistrm, // [ANY] {AVX}
1142 : kIdVpcmpq, // [ANY] {AVX512_F+VL}
1143 : kIdVpcmpub, // [ANY] {AVX512_BW+VL}
1144 : kIdVpcmpud, // [ANY] {AVX512_F+VL}
1145 : kIdVpcmpuq, // [ANY] {AVX512_F+VL}
1146 : kIdVpcmpuw, // [ANY] {AVX512_BW+VL}
1147 : kIdVpcmpw, // [ANY] {AVX512_BW+VL}
1148 : kIdVpcomb, // [ANY] {XOP}
1149 : kIdVpcomd, // [ANY] {XOP}
1150 : kIdVpcompressd, // [ANY] {AVX512_F+VL}
1151 : kIdVpcompressq, // [ANY] {AVX512_F+VL}
1152 : kIdVpcomq, // [ANY] {XOP}
1153 : kIdVpcomub, // [ANY] {XOP}
1154 : kIdVpcomud, // [ANY] {XOP}
1155 : kIdVpcomuq, // [ANY] {XOP}
1156 : kIdVpcomuw, // [ANY] {XOP}
1157 : kIdVpcomw, // [ANY] {XOP}
1158 : kIdVpconflictd, // [ANY] {AVX512_CDI+VL}
1159 : kIdVpconflictq, // [ANY] {AVX512_CDI+VL}
1160 : kIdVperm2f128, // [ANY] {AVX}
1161 : kIdVperm2i128, // [ANY] {AVX2}
1162 : kIdVpermb, // [ANY] {AVX512_VBMI+VL}
1163 : kIdVpermd, // [ANY] {AVX2|AVX512_F+VL}
1164 : kIdVpermi2b, // [ANY] {AVX512_VBMI+VL}
1165 : kIdVpermi2d, // [ANY] {AVX512_F+VL}
1166 : kIdVpermi2pd, // [ANY] {AVX512_F+VL}
1167 : kIdVpermi2ps, // [ANY] {AVX512_F+VL}
1168 : kIdVpermi2q, // [ANY] {AVX512_F+VL}
1169 : kIdVpermi2w, // [ANY] {AVX512_BW+VL}
1170 : kIdVpermil2pd, // [ANY] {XOP}
1171 : kIdVpermil2ps, // [ANY] {XOP}
1172 : kIdVpermilpd, // [ANY] {AVX|AVX512_F+VL}
1173 : kIdVpermilps, // [ANY] {AVX|AVX512_F+VL}
1174 : kIdVpermpd, // [ANY] {AVX2}
1175 : kIdVpermps, // [ANY] {AVX2}
1176 : kIdVpermq, // [ANY] {AVX2|AVX512_F+VL}
1177 : kIdVpermt2b, // [ANY] {AVX512_VBMI+VL}
1178 : kIdVpermt2d, // [ANY] {AVX512_F+VL}
1179 : kIdVpermt2pd, // [ANY] {AVX512_F+VL}
1180 : kIdVpermt2ps, // [ANY] {AVX512_F+VL}
1181 : kIdVpermt2q, // [ANY] {AVX512_F+VL}
1182 : kIdVpermt2w, // [ANY] {AVX512_BW+VL}
1183 : kIdVpermw, // [ANY] {AVX512_BW+VL}
1184 : kIdVpexpandd, // [ANY] {AVX512_F+VL}
1185 : kIdVpexpandq, // [ANY] {AVX512_F+VL}
1186 : kIdVpextrb, // [ANY] {AVX|AVX512_BW}
1187 : kIdVpextrd, // [ANY] {AVX|AVX512_DQ}
1188 : kIdVpextrq, // [X64] {AVX|AVX512_DQ}
1189 : kIdVpextrw, // [ANY] {AVX|AVX512_BW}
1190 : kIdVpgatherdd, // [ANY] {AVX2|AVX512_F+VL}
1191 : kIdVpgatherdq, // [ANY] {AVX2|AVX512_F+VL}
1192 : kIdVpgatherqd, // [ANY] {AVX2|AVX512_F+VL}
1193 : kIdVpgatherqq, // [ANY] {AVX2|AVX512_F+VL}
1194 : kIdVphaddbd, // [ANY] {XOP}
1195 : kIdVphaddbq, // [ANY] {XOP}
1196 : kIdVphaddbw, // [ANY] {XOP}
1197 : kIdVphaddd, // [ANY] {AVX|AVX2}
1198 : kIdVphadddq, // [ANY] {XOP}
1199 : kIdVphaddsw, // [ANY] {AVX|AVX2}
1200 : kIdVphaddubd, // [ANY] {XOP}
1201 : kIdVphaddubq, // [ANY] {XOP}
1202 : kIdVphaddubw, // [ANY] {XOP}
1203 : kIdVphaddudq, // [ANY] {XOP}
1204 : kIdVphadduwd, // [ANY] {XOP}
1205 : kIdVphadduwq, // [ANY] {XOP}
1206 : kIdVphaddw, // [ANY] {AVX|AVX2}
1207 : kIdVphaddwd, // [ANY] {XOP}
1208 : kIdVphaddwq, // [ANY] {XOP}
1209 : kIdVphminposuw, // [ANY] {AVX}
1210 : kIdVphsubbw, // [ANY] {XOP}
1211 : kIdVphsubd, // [ANY] {AVX|AVX2}
1212 : kIdVphsubdq, // [ANY] {XOP}
1213 : kIdVphsubsw, // [ANY] {AVX|AVX2}
1214 : kIdVphsubw, // [ANY] {AVX|AVX2}
1215 : kIdVphsubwd, // [ANY] {XOP}
1216 : kIdVpinsrb, // [ANY] {AVX|AVX512_BW}
1217 : kIdVpinsrd, // [ANY] {AVX|AVX512_DQ}
1218 : kIdVpinsrq, // [X64] {AVX|AVX512_DQ}
1219 : kIdVpinsrw, // [ANY] {AVX|AVX512_BW}
1220 : kIdVplzcntd, // [ANY] {AVX512_CDI+VL}
1221 : kIdVplzcntq, // [ANY] {AVX512_CDI+VL}
1222 : kIdVpmacsdd, // [ANY] {XOP}
1223 : kIdVpmacsdqh, // [ANY] {XOP}
1224 : kIdVpmacsdql, // [ANY] {XOP}
1225 : kIdVpmacssdd, // [ANY] {XOP}
1226 : kIdVpmacssdqh, // [ANY] {XOP}
1227 : kIdVpmacssdql, // [ANY] {XOP}
1228 : kIdVpmacsswd, // [ANY] {XOP}
1229 : kIdVpmacssww, // [ANY] {XOP}
1230 : kIdVpmacswd, // [ANY] {XOP}
1231 : kIdVpmacsww, // [ANY] {XOP}
1232 : kIdVpmadcsswd, // [ANY] {XOP}
1233 : kIdVpmadcswd, // [ANY] {XOP}
1234 : kIdVpmadd52huq, // [ANY] {AVX512_IFMA+VL}
1235 : kIdVpmadd52luq, // [ANY] {AVX512_IFMA+VL}
1236 : kIdVpmaddubsw, // [ANY] {AVX|AVX2|AVX512_BW+VL}
1237 : kIdVpmaddwd, // [ANY] {AVX|AVX2|AVX512_BW+VL}
1238 : kIdVpmaskmovd, // [ANY] {AVX2}
1239 : kIdVpmaskmovq, // [ANY] {AVX2}
1240 : kIdVpmaxsb, // [ANY] {AVX|AVX2|AVX512_BW+VL}
1241 : kIdVpmaxsd, // [ANY] {AVX|AVX2|AVX512_F+VL}
1242 : kIdVpmaxsq, // [ANY] {AVX512_F+VL}
1243 : kIdVpmaxsw, // [ANY] {AVX|AVX2|AVX512_BW+VL}
1244 : kIdVpmaxub, // [ANY] {AVX|AVX2|AVX512_BW+VL}
1245 : kIdVpmaxud, // [ANY] {AVX|AVX2|AVX512_F+VL}
1246 : kIdVpmaxuq, // [ANY] {AVX512_F+VL}
1247 : kIdVpmaxuw, // [ANY] {AVX|AVX2|AVX512_BW+VL}
1248 : kIdVpminsb, // [ANY] {AVX|AVX2|AVX512_BW+VL}
1249 : kIdVpminsd, // [ANY] {AVX|AVX2|AVX512_F+VL}
1250 : kIdVpminsq, // [ANY] {AVX512_F+VL}
1251 : kIdVpminsw, // [ANY] {AVX|AVX2|AVX512_BW+VL}
1252 : kIdVpminub, // [ANY] {AVX|AVX2|AVX512_BW+VL}
1253 : kIdVpminud, // [ANY] {AVX|AVX2|AVX512_F+VL}
1254 : kIdVpminuq, // [ANY] {AVX512_F+VL}
1255 : kIdVpminuw, // [ANY] {AVX|AVX2|AVX512_BW+VL}
1256 : kIdVpmovb2m, // [ANY] {AVX512_BW+VL}
1257 : kIdVpmovd2m, // [ANY] {AVX512_DQ+VL}
1258 : kIdVpmovdb, // [ANY] {AVX512_F+VL}
1259 : kIdVpmovdw, // [ANY] {AVX512_F+VL}
1260 : kIdVpmovm2b, // [ANY] {AVX512_BW+VL}
1261 : kIdVpmovm2d, // [ANY] {AVX512_DQ+VL}
1262 : kIdVpmovm2q, // [ANY] {AVX512_DQ+VL}
1263 : kIdVpmovm2w, // [ANY] {AVX512_BW+VL}
1264 : kIdVpmovmskb, // [ANY] {AVX|AVX2}
1265 : kIdVpmovq2m, // [ANY] {AVX512_DQ+VL}
1266 : kIdVpmovqb, // [ANY] {AVX512_F+VL}
1267 : kIdVpmovqd, // [ANY] {AVX512_F+VL}
1268 : kIdVpmovqw, // [ANY] {AVX512_F+VL}
1269 : kIdVpmovsdb, // [ANY] {AVX512_F+VL}
1270 : kIdVpmovsdw, // [ANY] {AVX512_F+VL}
1271 : kIdVpmovsqb, // [ANY] {AVX512_F+VL}
1272 : kIdVpmovsqd, // [ANY] {AVX512_F+VL}
1273 : kIdVpmovsqw, // [ANY] {AVX512_F+VL}
1274 : kIdVpmovswb, // [ANY] {AVX512_BW+VL}
1275 : kIdVpmovsxbd, // [ANY] {AVX|AVX2|AVX512_F+VL}
1276 : kIdVpmovsxbq, // [ANY] {AVX|AVX2|AVX512_F+VL}
1277 : kIdVpmovsxbw, // [ANY] {AVX|AVX2|AVX512_BW+VL}
1278 : kIdVpmovsxdq, // [ANY] {AVX|AVX2|AVX512_F+VL}
1279 : kIdVpmovsxwd, // [ANY] {AVX|AVX2|AVX512_F+VL}
1280 : kIdVpmovsxwq, // [ANY] {AVX|AVX2|AVX512_F+VL}
1281 : kIdVpmovusdb, // [ANY] {AVX512_F+VL}
1282 : kIdVpmovusdw, // [ANY] {AVX512_F+VL}
1283 : kIdVpmovusqb, // [ANY] {AVX512_F+VL}
1284 : kIdVpmovusqd, // [ANY] {AVX512_F+VL}
1285 : kIdVpmovusqw, // [ANY] {AVX512_F+VL}
1286 : kIdVpmovuswb, // [ANY] {AVX512_BW+VL}
1287 : kIdVpmovw2m, // [ANY] {AVX512_BW+VL}
1288 : kIdVpmovwb, // [ANY] {AVX512_BW+VL}
1289 : kIdVpmovzxbd, // [ANY] {AVX|AVX2|AVX512_F+VL}
1290 : kIdVpmovzxbq, // [ANY] {AVX|AVX2|AVX512_F+VL}
1291 : kIdVpmovzxbw, // [ANY] {AVX|AVX2|AVX512_BW+VL}
1292 : kIdVpmovzxdq, // [ANY] {AVX|AVX2|AVX512_F+VL}
1293 : kIdVpmovzxwd, // [ANY] {AVX|AVX2|AVX512_F+VL}
1294 : kIdVpmovzxwq, // [ANY] {AVX|AVX2|AVX512_F+VL}
1295 : kIdVpmuldq, // [ANY] {AVX|AVX2|AVX512_F+VL}
1296 : kIdVpmulhrsw, // [ANY] {AVX|AVX2|AVX512_BW+VL}
1297 : kIdVpmulhuw, // [ANY] {AVX|AVX2|AVX512_BW+VL}
1298 : kIdVpmulhw, // [ANY] {AVX|AVX2|AVX512_BW+VL}
1299 : kIdVpmulld, // [ANY] {AVX|AVX2|AVX512_F+VL}
1300 : kIdVpmullq, // [ANY] {AVX512_DQ+VL}
1301 : kIdVpmullw, // [ANY] {AVX|AVX2|AVX512_BW+VL}
1302 : kIdVpmultishiftqb, // [ANY] {AVX512_VBMI+VL}
1303 : kIdVpmuludq, // [ANY] {AVX|AVX2|AVX512_F+VL}
1304 : kIdVpopcntd, // [ANY] {AVX512_VPOPCNTDQ}
1305 : kIdVpopcntq, // [ANY] {AVX512_VPOPCNTDQ}
1306 : kIdVpor, // [ANY] {AVX|AVX2}
1307 : kIdVpord, // [ANY] {AVX512_F+VL}
1308 : kIdVporq, // [ANY] {AVX512_F+VL}
1309 : kIdVpperm, // [ANY] {XOP}
1310 : kIdVprold, // [ANY] {AVX512_F+VL}
1311 : kIdVprolq, // [ANY] {AVX512_F+VL}
1312 : kIdVprolvd, // [ANY] {AVX512_F+VL}
1313 : kIdVprolvq, // [ANY] {AVX512_F+VL}
1314 : kIdVprord, // [ANY] {AVX512_F+VL}
1315 : kIdVprorq, // [ANY] {AVX512_F+VL}
1316 : kIdVprorvd, // [ANY] {AVX512_F+VL}
1317 : kIdVprorvq, // [ANY] {AVX512_F+VL}
1318 : kIdVprotb, // [ANY] {XOP}
1319 : kIdVprotd, // [ANY] {XOP}
1320 : kIdVprotq, // [ANY] {XOP}
1321 : kIdVprotw, // [ANY] {XOP}
1322 : kIdVpsadbw, // [ANY] {AVX|AVX2|AVX512_BW+VL}
1323 : kIdVpscatterdd, // [ANY] {AVX512_F+VL}
1324 : kIdVpscatterdq, // [ANY] {AVX512_F+VL}
1325 : kIdVpscatterqd, // [ANY] {AVX512_F+VL}
1326 : kIdVpscatterqq, // [ANY] {AVX512_F+VL}
1327 : kIdVpshab, // [ANY] {XOP}
1328 : kIdVpshad, // [ANY] {XOP}
1329 : kIdVpshaq, // [ANY] {XOP}
1330 : kIdVpshaw, // [ANY] {XOP}
1331 : kIdVpshlb, // [ANY] {XOP}
1332 : kIdVpshld, // [ANY] {XOP}
1333 : kIdVpshlq, // [ANY] {XOP}
1334 : kIdVpshlw, // [ANY] {XOP}
1335 : kIdVpshufb, // [ANY] {AVX|AVX2|AVX512_BW+VL}
1336 : kIdVpshufd, // [ANY] {AVX|AVX2|AVX512_F+VL}
1337 : kIdVpshufhw, // [ANY] {AVX|AVX2|AVX512_BW+VL}
1338 : kIdVpshuflw, // [ANY] {AVX|AVX2|AVX512_BW+VL}
1339 : kIdVpsignb, // [ANY] {AVX|AVX2}
1340 : kIdVpsignd, // [ANY] {AVX|AVX2}
1341 : kIdVpsignw, // [ANY] {AVX|AVX2}
1342 : kIdVpslld, // [ANY] {AVX|AVX2|AVX512_F+VL}
1343 : kIdVpslldq, // [ANY] {AVX|AVX2|AVX512_BW+VL}
1344 : kIdVpsllq, // [ANY] {AVX|AVX2|AVX512_F+VL}
1345 : kIdVpsllvd, // [ANY] {AVX2|AVX512_F+VL}
1346 : kIdVpsllvq, // [ANY] {AVX2|AVX512_F+VL}
1347 : kIdVpsllvw, // [ANY] {AVX512_BW+VL}
1348 : kIdVpsllw, // [ANY] {AVX|AVX2|AVX512_BW+VL}
1349 : kIdVpsrad, // [ANY] {AVX|AVX2|AVX512_F+VL}
1350 : kIdVpsraq, // [ANY] {AVX512_F+VL}
1351 : kIdVpsravd, // [ANY] {AVX2|AVX512_F+VL}
1352 : kIdVpsravq, // [ANY] {AVX512_F+VL}
1353 : kIdVpsravw, // [ANY] {AVX512_BW+VL}
1354 : kIdVpsraw, // [ANY] {AVX|AVX2|AVX512_BW+VL}
1355 : kIdVpsrld, // [ANY] {AVX|AVX2|AVX512_F+VL}
1356 : kIdVpsrldq, // [ANY] {AVX|AVX2|AVX512_BW+VL}
1357 : kIdVpsrlq, // [ANY] {AVX|AVX2|AVX512_F+VL}
1358 : kIdVpsrlvd, // [ANY] {AVX2|AVX512_F+VL}
1359 : kIdVpsrlvq, // [ANY] {AVX2|AVX512_F+VL}
1360 : kIdVpsrlvw, // [ANY] {AVX512_BW+VL}
1361 : kIdVpsrlw, // [ANY] {AVX|AVX2|AVX512_BW+VL}
1362 : kIdVpsubb, // [ANY] {AVX|AVX2|AVX512_BW+VL}
1363 : kIdVpsubd, // [ANY] {AVX|AVX2|AVX512_F+VL}
1364 : kIdVpsubq, // [ANY] {AVX|AVX2|AVX512_F+VL}
1365 : kIdVpsubsb, // [ANY] {AVX|AVX2|AVX512_BW+VL}
1366 : kIdVpsubsw, // [ANY] {AVX|AVX2|AVX512_BW+VL}
1367 : kIdVpsubusb, // [ANY] {AVX|AVX2|AVX512_BW+VL}
1368 : kIdVpsubusw, // [ANY] {AVX|AVX2|AVX512_BW+VL}
1369 : kIdVpsubw, // [ANY] {AVX|AVX2|AVX512_BW+VL}
1370 : kIdVpternlogd, // [ANY] {AVX512_F+VL}
1371 : kIdVpternlogq, // [ANY] {AVX512_F+VL}
1372 : kIdVptest, // [ANY] {AVX}
1373 : kIdVptestmb, // [ANY] {AVX512_BW+VL}
1374 : kIdVptestmd, // [ANY] {AVX512_F+VL}
1375 : kIdVptestmq, // [ANY] {AVX512_F+VL}
1376 : kIdVptestmw, // [ANY] {AVX512_BW+VL}
1377 : kIdVptestnmb, // [ANY] {AVX512_BW+VL}
1378 : kIdVptestnmd, // [ANY] {AVX512_F+VL}
1379 : kIdVptestnmq, // [ANY] {AVX512_F+VL}
1380 : kIdVptestnmw, // [ANY] {AVX512_BW+VL}
1381 : kIdVpunpckhbw, // [ANY] {AVX|AVX2|AVX512_BW+VL}
1382 : kIdVpunpckhdq, // [ANY] {AVX|AVX2|AVX512_F+VL}
1383 : kIdVpunpckhqdq, // [ANY] {AVX|AVX2|AVX512_F+VL}
1384 : kIdVpunpckhwd, // [ANY] {AVX|AVX2|AVX512_BW+VL}
1385 : kIdVpunpcklbw, // [ANY] {AVX|AVX2|AVX512_BW+VL}
1386 : kIdVpunpckldq, // [ANY] {AVX|AVX2|AVX512_F+VL}
1387 : kIdVpunpcklqdq, // [ANY] {AVX|AVX2|AVX512_F+VL}
1388 : kIdVpunpcklwd, // [ANY] {AVX|AVX2|AVX512_BW+VL}
1389 : kIdVpxor, // [ANY] {AVX|AVX2}
1390 : kIdVpxord, // [ANY] {AVX512_F+VL}
1391 : kIdVpxorq, // [ANY] {AVX512_F+VL}
1392 : kIdVrangepd, // [ANY] {AVX512_DQ+VL}
1393 : kIdVrangeps, // [ANY] {AVX512_DQ+VL}
1394 : kIdVrangesd, // [ANY] {AVX512_DQ}
1395 : kIdVrangess, // [ANY] {AVX512_DQ}
1396 : kIdVrcp14pd, // [ANY] {AVX512_F+VL}
1397 : kIdVrcp14ps, // [ANY] {AVX512_F+VL}
1398 : kIdVrcp14sd, // [ANY] {AVX512_F}
1399 : kIdVrcp14ss, // [ANY] {AVX512_F}
1400 : kIdVrcp28pd, // [ANY] {AVX512_ERI}
1401 : kIdVrcp28ps, // [ANY] {AVX512_ERI}
1402 : kIdVrcp28sd, // [ANY] {AVX512_ERI}
1403 : kIdVrcp28ss, // [ANY] {AVX512_ERI}
1404 : kIdVrcpps, // [ANY] {AVX}
1405 : kIdVrcpss, // [ANY] {AVX}
1406 : kIdVreducepd, // [ANY] {AVX512_DQ+VL}
1407 : kIdVreduceps, // [ANY] {AVX512_DQ+VL}
1408 : kIdVreducesd, // [ANY] {AVX512_DQ}
1409 : kIdVreducess, // [ANY] {AVX512_DQ}
1410 : kIdVrndscalepd, // [ANY] {AVX512_F+VL}
1411 : kIdVrndscaleps, // [ANY] {AVX512_F+VL}
1412 : kIdVrndscalesd, // [ANY] {AVX512_F}
1413 : kIdVrndscaless, // [ANY] {AVX512_F}
1414 : kIdVroundpd, // [ANY] {AVX}
1415 : kIdVroundps, // [ANY] {AVX}
1416 : kIdVroundsd, // [ANY] {AVX}
1417 : kIdVroundss, // [ANY] {AVX}
1418 : kIdVrsqrt14pd, // [ANY] {AVX512_F+VL}
1419 : kIdVrsqrt14ps, // [ANY] {AVX512_F+VL}
1420 : kIdVrsqrt14sd, // [ANY] {AVX512_F}
1421 : kIdVrsqrt14ss, // [ANY] {AVX512_F}
1422 : kIdVrsqrt28pd, // [ANY] {AVX512_ERI}
1423 : kIdVrsqrt28ps, // [ANY] {AVX512_ERI}
1424 : kIdVrsqrt28sd, // [ANY] {AVX512_ERI}
1425 : kIdVrsqrt28ss, // [ANY] {AVX512_ERI}
1426 : kIdVrsqrtps, // [ANY] {AVX}
1427 : kIdVrsqrtss, // [ANY] {AVX}
1428 : kIdVscalefpd, // [ANY] {AVX512_F+VL}
1429 : kIdVscalefps, // [ANY] {AVX512_F+VL}
1430 : kIdVscalefsd, // [ANY] {AVX512_F}
1431 : kIdVscalefss, // [ANY] {AVX512_F}
1432 : kIdVscatterdpd, // [ANY] {AVX512_F+VL}
1433 : kIdVscatterdps, // [ANY] {AVX512_F+VL}
1434 : kIdVscatterpf0dpd, // [ANY] {AVX512_PFI}
1435 : kIdVscatterpf0dps, // [ANY] {AVX512_PFI}
1436 : kIdVscatterpf0qpd, // [ANY] {AVX512_PFI}
1437 : kIdVscatterpf0qps, // [ANY] {AVX512_PFI}
1438 : kIdVscatterpf1dpd, // [ANY] {AVX512_PFI}
1439 : kIdVscatterpf1dps, // [ANY] {AVX512_PFI}
1440 : kIdVscatterpf1qpd, // [ANY] {AVX512_PFI}
1441 : kIdVscatterpf1qps, // [ANY] {AVX512_PFI}
1442 : kIdVscatterqpd, // [ANY] {AVX512_F+VL}
1443 : kIdVscatterqps, // [ANY] {AVX512_F+VL}
1444 : kIdVshuff32x4, // [ANY] {AVX512_F+VL}
1445 : kIdVshuff64x2, // [ANY] {AVX512_F+VL}
1446 : kIdVshufi32x4, // [ANY] {AVX512_F+VL}
1447 : kIdVshufi64x2, // [ANY] {AVX512_F+VL}
1448 : kIdVshufpd, // [ANY] {AVX|AVX512_F+VL}
1449 : kIdVshufps, // [ANY] {AVX|AVX512_F+VL}
1450 : kIdVsqrtpd, // [ANY] {AVX|AVX512_F+VL}
1451 : kIdVsqrtps, // [ANY] {AVX|AVX512_F+VL}
1452 : kIdVsqrtsd, // [ANY] {AVX|AVX512_F}
1453 : kIdVsqrtss, // [ANY] {AVX|AVX512_F}
1454 : kIdVstmxcsr, // [ANY] {AVX}
1455 : kIdVsubpd, // [ANY] {AVX|AVX512_F+VL}
1456 : kIdVsubps, // [ANY] {AVX|AVX512_F+VL}
1457 : kIdVsubsd, // [ANY] {AVX|AVX512_F}
1458 : kIdVsubss, // [ANY] {AVX|AVX512_F}
1459 : kIdVtestpd, // [ANY] {AVX}
1460 : kIdVtestps, // [ANY] {AVX}
1461 : kIdVucomisd, // [ANY] {AVX|AVX512_F}
1462 : kIdVucomiss, // [ANY] {AVX|AVX512_F}
1463 : kIdVunpckhpd, // [ANY] {AVX|AVX512_F+VL}
1464 : kIdVunpckhps, // [ANY] {AVX|AVX512_F+VL}
1465 : kIdVunpcklpd, // [ANY] {AVX|AVX512_F+VL}
1466 : kIdVunpcklps, // [ANY] {AVX|AVX512_F+VL}
1467 : kIdVxorpd, // [ANY] {AVX|AVX512_DQ+VL}
1468 : kIdVxorps, // [ANY] {AVX|AVX512_DQ+VL}
1469 : kIdVzeroall, // [ANY] {AVX}
1470 : kIdVzeroupper, // [ANY] {AVX}
1471 : kIdWbinvd, // [ANY]
1472 : kIdWrfsbase, // [X64] {FSGSBASE}
1473 : kIdWrgsbase, // [X64] {FSGSBASE}
1474 : kIdWrmsr, // [ANY] {MSR}
1475 : kIdXabort, // [ANY] {RTM}
1476 : kIdXadd, // [ANY] {I486}
1477 : kIdXbegin, // [ANY] {RTM}
1478 : kIdXchg, // [ANY]
1479 : kIdXend, // [ANY] {RTM}
1480 : kIdXgetbv, // [ANY] {XSAVE}
1481 : kIdXlatb, // [ANY]
1482 : kIdXor, // [ANY]
1483 : kIdXorpd, // [ANY] {SSE2}
1484 : kIdXorps, // [ANY] {SSE}
1485 : kIdXrstor, // [ANY] {XSAVE}
1486 : kIdXrstor64, // [X64] {XSAVE}
1487 : kIdXrstors, // [ANY] {XSAVES}
1488 : kIdXrstors64, // [X64] {XSAVES}
1489 : kIdXsave, // [ANY] {XSAVE}
1490 : kIdXsave64, // [X64] {XSAVE}
1491 : kIdXsavec, // [ANY] {XSAVEC}
1492 : kIdXsavec64, // [X64] {XSAVEC}
1493 : kIdXsaveopt, // [ANY] {XSAVEOPT}
1494 : kIdXsaveopt64, // [X64] {XSAVEOPT}
1495 : kIdXsaves, // [ANY] {XSAVES}
1496 : kIdXsaves64, // [X64] {XSAVES}
1497 : kIdXsetbv, // [ANY] {XSAVE}
1498 : kIdXtest, // [ANY] {TSX}
1499 : _kIdCount
1500 : // ${idData:End}
1501 : };
1502 :
1503 : //! Instruction encodings, used by \ref X86Assembler (AsmJit specific).
1504 : ASMJIT_ENUM(EncodingType) {
1505 : kEncodingNone = 0, //!< Never used.
1506 : kEncodingX86Op, //!< X86 [OP].
1507 : kEncodingX86Op_O, //!< X86 [OP] (opcode and /0-7).
1508 : kEncodingX86Op_O_I8, //!< X86 [OP] (opcode and /0-7 + 8-bit immediate).
1509 : kEncodingX86Op_xAX, //!< X86 [OP] (implicit or explicit '?AX' form).
1510 : kEncodingX86Op_xDX_xAX, //!< X86 [OP] (implicit or explicit '?DX, ?AX' form).
1511 : kEncodingX86Op_ZAX, //!< X86 [OP] (implicit or explicit '[EAX|RDX]' form).
1512 : kEncodingX86I_xAX, //!< X86 [I] (implicit or explicit '?AX' form).
1513 : kEncodingX86M, //!< X86 [M] (handles 2|4|8-bytes size).
1514 : kEncodingX86M_GPB, //!< X86 [M] (handles single-byte size).
1515 : kEncodingX86M_GPB_MulDiv, //!< X86 [M] (like GPB, handles implicit|explicit MUL|DIV|IDIV).
1516 : kEncodingX86M_Only, //!< X86 [M] (restricted to memory operand of any size).
1517 : kEncodingX86Rm, //!< X86 [RM] (doesn't handle single-byte size).
1518 : kEncodingX86Rm_Raw66H, //!< X86 [RM] (used by LZCNT, POPCNT, and TZCNT).
1519 : kEncodingX86Rm_NoRexW, //!< X86 [RM] (doesn't add REX.W prefix if 64-bit reg is used).
1520 : kEncodingX86Mr, //!< X86 [MR] (doesn't handle single-byte size).
1521 : kEncodingX86Mr_NoSize, //!< X86 [MR] (doesn't handle any size).
1522 : kEncodingX86Arith, //!< X86 adc, add, and, cmp, or, sbb, sub, xor.
1523 : kEncodingX86Bswap, //!< X86 bswap.
1524 : kEncodingX86Bt, //!< X86 bt, btc, btr, bts.
1525 : kEncodingX86Call, //!< X86 call.
1526 : kEncodingX86Cmpxchg, //!< X86 [MR] cmpxchg.
1527 : kEncodingX86Crc, //!< X86 crc32.
1528 : kEncodingX86Enter, //!< X86 enter.
1529 : kEncodingX86Imul, //!< X86 imul.
1530 : kEncodingX86In, //!< X86 in.
1531 : kEncodingX86Ins, //!< X86 ins[b|q|d].
1532 : kEncodingX86IncDec, //!< X86 inc, dec.
1533 : kEncodingX86Int, //!< X86 int (interrupt).
1534 : kEncodingX86Jcc, //!< X86 jcc.
1535 : kEncodingX86JecxzLoop, //!< X86 jcxz, jecxz, jrcxz, loop, loope, loopne.
1536 : kEncodingX86Jmp, //!< X86 jmp.
1537 : kEncodingX86JmpRel, //!< X86 xbegin.
1538 : kEncodingX86Lea, //!< X86 lea.
1539 : kEncodingX86Mov, //!< X86 mov (all possible cases).
1540 : kEncodingX86MovsxMovzx, //!< X86 movsx, movzx.
1541 : kEncodingX86Out, //!< X86 out.
1542 : kEncodingX86Outs, //!< X86 out[b|q|d].
1543 : kEncodingX86Push, //!< X86 push.
1544 : kEncodingX86Pop, //!< X86 pop.
1545 : kEncodingX86Ret, //!< X86 ret.
1546 : kEncodingX86Rot, //!< X86 rcl, rcr, rol, ror, sal, sar, shl, shr.
1547 : kEncodingX86Set, //!< X86 setcc.
1548 : kEncodingX86ShldShrd, //!< X86 shld, shrd.
1549 : kEncodingX86StrRm, //!< X86 lods.
1550 : kEncodingX86StrMr, //!< X86 scas, stos.
1551 : kEncodingX86StrMm, //!< X86 cmps, movs.
1552 : kEncodingX86Test, //!< X86 test.
1553 : kEncodingX86Xadd, //!< X86 xadd.
1554 : kEncodingX86Xchg, //!< X86 xchg.
1555 : kEncodingX86Fence, //!< X86 lfence, mfence, sfence.
1556 : kEncodingX86Bndmov, //!< X86 [RM|MR] (used by BNDMOV).
1557 : kEncodingFpuOp, //!< FPU [OP].
1558 : kEncodingFpuArith, //!< FPU fadd, fdiv, fdivr, fmul, fsub, fsubr.
1559 : kEncodingFpuCom, //!< FPU fcom, fcomp.
1560 : kEncodingFpuFldFst, //!< FPU fld, fst, fstp.
1561 : kEncodingFpuM, //!< FPU fiadd, ficom, ficomp, fidiv, fidivr, fild, fimul, fist, fistp, fisttp, fisub, fisubr.
1562 : kEncodingFpuR, //!< FPU fcmov, fcomi, fcomip, ffree, fucom, fucomi, fucomip, fucomp, fxch.
1563 : kEncodingFpuRDef, //!< FPU faddp, fdivp, fdivrp, fmulp, fsubp, fsubrp.
1564 : kEncodingFpuStsw, //!< FPU fnstsw, Fstsw.
1565 : kEncodingExtRm, //!< EXT [RM].
1566 : kEncodingExtRm_XMM0, //!< EXT [RM<XMM0>].
1567 : kEncodingExtRm_ZDI, //!< EXT [RM<ZDI>].
1568 : kEncodingExtRm_P, //!< EXT [RM] (propagates 66H if the instruction uses XMM register).
1569 : kEncodingExtRm_Wx, //!< EXT [RM] (propagates REX.W if GPQ is used).
1570 : kEncodingExtRmRi, //!< EXT [RM|RI].
1571 : kEncodingExtRmRi_P, //!< EXT [RM|RI] (propagates 66H if the instruction uses XMM register).
1572 : kEncodingExtRmi, //!< EXT [RMI].
1573 : kEncodingExtRmi_P, //!< EXT [RMI] (propagates 66H if the instruction uses XMM register).
1574 : kEncodingExtPextrw, //!< EXT pextrw.
1575 : kEncodingExtExtract, //!< EXT pextrb, pextrd, pextrq, extractps.
1576 : kEncodingExtMov, //!< EXT mov?? - #1:[MM|XMM, MM|XMM|Mem] #2:[MM|XMM|Mem, MM|XMM].
1577 : kEncodingExtMovnti, //!< EXT movnti.
1578 : kEncodingExtMovbe, //!< EXT movbe.
1579 : kEncodingExtMovd, //!< EXT movd.
1580 : kEncodingExtMovq, //!< EXT movq.
1581 : kEncodingExtExtrq, //!< EXT extrq (SSE4A).
1582 : kEncodingExtInsertq, //!< EXT insrq (SSE4A).
1583 : kEncodingExt3dNow, //!< EXT [RMI] (3DNOW specific).
1584 : kEncodingVexOp, //!< VEX [OP].
1585 : kEncodingVexKmov, //!< VEX [RM|MR] (used by kmov[b|w|d|q]).
1586 : kEncodingVexM, //!< VEX|EVEX [M].
1587 : kEncodingVexM_VM, //!< VEX|EVEX [M] (propagates VEX|EVEX.L, VSIB support).
1588 : kEncodingVexMr_Lx, //!< VEX|EVEX [MR] (propagates VEX|EVEX.L if YMM used).
1589 : kEncodingVexMr_VM, //!< VEX|EVEX [MR] (propagates VEX|EVEX.L, VSIB support).
1590 : kEncodingVexMri, //!< VEX|EVEX [MRI].
1591 : kEncodingVexMri_Lx, //!< VEX|EVEX [MRI] (propagates VEX|EVEX.L if YMM used).
1592 : kEncodingVexRm, //!< VEX|EVEX [RM].
1593 : kEncodingVexRm_ZDI, //!< VEX|EVEX [RM<ZDI>].
1594 : kEncodingVexRm_Wx, //!< VEX|EVEX [RM] (propagates VEX|EVEX.W if GPQ used).
1595 : kEncodingVexRm_Lx, //!< VEX|EVEX [RM] (propagates VEX|EVEX.L if YMM used).
1596 : kEncodingVexRm_VM, //!< VEX|EVEX [RM] (propagates VEX|EVEX.L, VSIB support).
1597 : kEncodingVexRm_T1_4X, //!< EVEX [RM] (used by NN instructions that use RM-T1_4X encoding).
1598 : kEncodingVexRmi, //!< VEX|EVEX [RMI].
1599 : kEncodingVexRmi_Wx, //!< VEX|EVEX [RMI] (propagates VEX|EVEX.W if GPQ used).
1600 : kEncodingVexRmi_Lx, //!< VEX|EVEX [RMI] (propagates VEX|EVEX.L if YMM used).
1601 : kEncodingVexRvm, //!< VEX|EVEX [RVM].
1602 : kEncodingVexRvm_Wx, //!< VEX|EVEX [RVM] (propagates VEX|EVEX.W if GPQ used).
1603 : kEncodingVexRvm_ZDX_Wx, //!< VEX|EVEX [RVM<ZDX>] (propagates VEX|EVEX.W if GPQ used).
1604 : kEncodingVexRvm_Lx, //!< VEX|EVEX [RVM] (propagates VEX|EVEX.L if YMM used).
1605 : kEncodingVexRvmr, //!< VEX|EVEX [RVMR].
1606 : kEncodingVexRvmr_Lx, //!< VEX|EVEX [RVMR] (propagates VEX|EVEX.L if YMM used).
1607 : kEncodingVexRvmi, //!< VEX|EVEX [RVMI].
1608 : kEncodingVexRvmi_Lx, //!< VEX|EVEX [RVMI] (propagates VEX|EVEX.L if YMM used).
1609 : kEncodingVexRmv, //!< VEX|EVEX [RMV].
1610 : kEncodingVexRmv_Wx, //!< VEX|EVEX [RMV] (propagates VEX|EVEX.W if GPQ used).
1611 : kEncodingVexRmv_VM, //!< VEX|EVEX [RMV] (propagates VEX|EVEX.L, VSIB support).
1612 : kEncodingVexRmvRm_VM, //!< VEX|EVEX [RMV|RM] (propagates VEX|EVEX.L, VSIB support).
1613 : kEncodingVexRmvi, //!< VEX|EVEX [RMVI].
1614 : kEncodingVexRmMr, //!< VEX|EVEX [RM|MR].
1615 : kEncodingVexRmMr_Lx, //!< VEX|EVEX [RM|MR] (propagates VEX|EVEX.L if YMM used).
1616 : kEncodingVexRvmRmv, //!< VEX|EVEX [RVM|RMV].
1617 : kEncodingVexRvmRmi, //!< VEX|EVEX [RVM|RMI].
1618 : kEncodingVexRvmRmi_Lx, //!< VEX|EVEX [RVM|RMI] (propagates VEX|EVEX.L if YMM used).
1619 : kEncodingVexRvmRmvRmi, //!< VEX|EVEX [RVM|RMV|RMI].
1620 : kEncodingVexRvmMr, //!< VEX|EVEX [RVM|MR].
1621 : kEncodingVexRvmMvr, //!< VEX|EVEX [RVM|MVR].
1622 : kEncodingVexRvmMvr_Lx, //!< VEX|EVEX [RVM|MVR] (propagates VEX|EVEX.L if YMM used).
1623 : kEncodingVexRvmVmi, //!< VEX|EVEX [RVM|VMI].
1624 : kEncodingVexRvmVmi_Lx, //!< VEX|EVEX [RVM|VMI] (propagates VEX|EVEX.L if YMM used).
1625 : kEncodingVexVm, //!< VEX|EVEX [VM].
1626 : kEncodingVexVm_Wx, //!< VEX|EVEX [VM] (propagates VEX|EVEX.W if GPQ used).
1627 : kEncodingVexVmi, //!< VEX|EVEX [VMI].
1628 : kEncodingVexVmi_Lx, //!< VEX|EVEX [VMI] (propagates VEX|EVEX.L if YMM used).
1629 : kEncodingVexEvexVmi_Lx, //!< VEX|EVEX [VMI] (special, used by vpsrldq and vpslldq)
1630 : kEncodingVexRvrmRvmr, //!< VEX|EVEX [RVRM|RVMR].
1631 : kEncodingVexRvrmRvmr_Lx, //!< VEX|EVEX [RVRM|RVMR] (propagates VEX|EVEX.L if YMM used).
1632 : kEncodingVexRvrmiRvmri_Lx, //!< VEX|EVEX [RVRMI|RVMRI] (propagates VEX|EVEX.L if YMM used).
1633 : kEncodingVexMovdMovq, //!< VEX|EVEX vmovd, vmovq.
1634 : kEncodingVexMovssMovsd, //!< VEX|EVEX vmovss, vmovsd.
1635 : kEncodingFma4, //!< FMA4 [R, R, R/M, R/M].
1636 : kEncodingFma4_Lx, //!< FMA4 [R, R, R/M, R/M] (propagates AVX.L if YMM used).
1637 : _kEncodingCount //!< Count of instruction encodings.
1638 : };
1639 :
1640 : //! Describes a meaning of all bits of AsmJit's 32-bit opcode (AsmJit specific).
1641 : //!
1642 : //! This schema is AsmJit specific and has been designed to allow encoding of
1643 : //! all X86 instructions available. X86, MMX, and SSE+ instructions always use
1644 : //! `MM` and `PP` fields, which are encoded to corresponding prefixes needed
1645 : //! by X86 or SIMD instructions. AVX+ instructions embed `MMMMM` and `PP` fields
1646 : //! in a VEX prefix, and AVX-512 instructions embed `MM` and `PP` in EVEX prefix.
1647 : //!
1648 : //! The instruction opcode definition uses 1 or 2 bytes as an opcode value. 1
1649 : //! byte is needed by most of the instructions, 2 bytes are only used by legacy
1650 : //! X87-FPU instructions. This means that a second byte is free to by used by
1651 : //! instructions encoded by using VEX and/or EVEX prefix.
1652 : //!
1653 : //! The fields description:
1654 : //!
1655 : //! - `MM` field is used to encode prefixes needed by the instruction or as
1656 : //! a part of VEX/EVEX prefix. Described as `mm` and `mmmmm` in instruction
1657 : //! manuals.
1658 : //!
1659 : //! NOTE: Since `MM` field is defined as `mmmmm` (5 bits), but only 2 least
1660 : //! significant bits are used by VEX and EVEX prefixes, and additional 4th
1661 : //! bit is used by XOP prefix, AsmJit uses the 3rd and 5th bit for it's own
1662 : //! purposes. These bits will probably never be used in future encodings as
1663 : //! AVX512 uses only `000mm` from `mmmmm`.
1664 : //!
1665 : //! - `PP` field is used to encode prefixes needed by the instruction or as a
1666 : //! part of VEX/EVEX prefix. Described as `pp` in instruction manuals.
1667 : //!
1668 : //! - `LL` field is used exclusively by AVX+ and AVX512+ instruction sets. It
1669 : //! describes vector size, which is `L.128` for XMM register, `L.256` for
1670 : //! for YMM register, and `L.512` for ZMM register. The `LL` field is omitted
1671 : //! in case that instruction supports multiple vector lengths, however, if the
1672 : //! instruction requires specific `L` value it must be specified as a part of
1673 : //! the opcode.
1674 : //!
1675 : //! NOTE: `LL` having value `11` is not defined yet.
1676 : //!
1677 : //! - `W` field is the most complicated. It was added by 64-bit architecture
1678 : //! to promote default operation width (instructions that perform 32-bit
1679 : //! operation by default require to override the width to 64-bit explicitly).
1680 : //! There is nothing wrong on this, however, some instructions introduced
1681 : //! implicit `W` override, for example a `cdqe` instruction is basically a
1682 : //! `cwde` instruction with overridden `W` (set to 1). There are some others
1683 : //! in the base X86 instruction set. More recent instruction sets started
1684 : //! using `W` field more often:
1685 : //!
1686 : //! - AVX instructions started using `W` field as an extended opcode for FMA,
1687 : //! GATHER, PERM, and other instructions. It also uses `W` field to override
1688 : //! the default operation width in instructions like `vmovq`.
1689 : //!
1690 : //! - AVX-512 instructions started using `W` field as an extended opcode for
1691 : //! all new instructions. This wouldn't have been an issue if the `W` field
1692 : //! of AVX-512 have matched AVX, but this is not always the case.
1693 : //!
1694 : //! - `O` field is an extended opcode field (3 bits) embedded in ModR/M BYTE.
1695 : //!
1696 : //! - `CDSHL` and `CDTT` fields describe 'compressed-displacement'. `CDSHL` is
1697 : //! defined for each instruction that is AVX-512 encodable (EVEX) and contains
1698 : //! a base N shift (base shift to perform the calculation). The `CDTT` field
1699 : //! is derived from instruction specification and describes additional shift
1700 : //! to calculate the final `CDSHL` that will be used in SIB byte.
1701 : //!
1702 : //! NOTE: Don't reorder any fields here, the shifts and masks were defined
1703 : //! carefully to make encoding of X86|X64 instructions fast, especially to
1704 : //! construct REX, VEX, and EVEX prefixes in the most efficient way. Changing
1705 : //! values defined by these enums many cause AsmJit to emit invalid binary
1706 : //! representations of instructions passed to `X86Assembler::_emit`.
1707 : ASMJIT_ENUM(OpCodeBits) {
1708 : // MM & VEX & EVEX & XOP
1709 : // ---------------------
1710 : //
1711 : // Two meanings:
1712 : // * `MMMMM` field in AVX/XOP/AVX-512 instruction.
1713 : // * Part of the opcode in legacy encoding (bytes emitted before the main
1714 : // opcode byte).
1715 : //
1716 : // AVX reserves 5 bits for `MMMMM` field, however AVX instructions only use
1717 : // 2 bits and XOP 3 bits. AVX-512 shrinks `MMMMM` field into `MM` so it's
1718 : // safe to assume that bits [4:2] of `MM` field won't be used in future
1719 : // extensions, which will most probably use EVEX encoding. AsmJit divides
1720 : // MM field into this layout:
1721 : //
1722 : // [1:0] - Used to describe 0F, 0F38 and 0F3A legacy prefix bytes and
1723 : // 2 bits of MM field.
1724 : // [2] - Used to force 3-BYTE VEX prefix, but then cleared to zero before
1725 : // the prefix is emitted. This bit is not used by any instruction
1726 : // so it can be used for any purpose by AsmJit. Also, this bit is
1727 : // used as an extension to `MM` field describing 0F|0F38|0F3A to also
1728 : // describe 0F01 as used by some legacy instructions (instructions
1729 : // not using VEX/EVEX prefix).
1730 : // [3] - Required by XOP instructions, so we use this bit also to indicate
1731 : // that this is a XOP opcode.
1732 : kOpCode_MM_Shift = 8,
1733 : kOpCode_MM_Mask = 0x1FU << kOpCode_MM_Shift,
1734 : kOpCode_MM_00 = 0x00U << kOpCode_MM_Shift,
1735 : kOpCode_MM_0F = 0x01U << kOpCode_MM_Shift,
1736 : kOpCode_MM_0F38 = 0x02U << kOpCode_MM_Shift,
1737 : kOpCode_MM_0F3A = 0x03U << kOpCode_MM_Shift, // Described also as XOP.M3 in AMD manuals.
1738 : kOpCode_MM_0F01 = 0x04U << kOpCode_MM_Shift, // AsmJit way to describe 0F01 (never VEX/EVEX).
1739 :
1740 : // `XOP` field is only used to force XOP prefix instead of VEX3 prefix. We
1741 : // know that only XOP encoding uses bit 0b1000 of MM field and that no VEX
1742 : // and EVEX instruction uses such bit, so we can use this bit to force XOP
1743 : // prefix to be emitted instead of VEX3 prefix. See `x86VEXPrefix` defined
1744 : // in `x86assembler.cpp`.
1745 : kOpCode_MM_XOP08 = 0x08U << kOpCode_MM_Shift, // XOP.M8.
1746 : kOpCode_MM_XOP09 = 0x09U << kOpCode_MM_Shift, // XOP.M9.
1747 :
1748 : kOpCode_MM_IsXOP_Shift= kOpCode_MM_Shift + 3,
1749 : kOpCode_MM_IsXOP = kOpCode_MM_XOP08,
1750 :
1751 : // NOTE: Force VEX3 allows to force to emit VEX3 instead of VEX2 in some
1752 : // cases (similar to forcing REX prefix). Force EVEX will force emitting
1753 : // EVEX prefix instead of VEX2|VEX3. EVEX-only instructions will have
1754 : // ForceEvex always set, however. instructions that can be encoded by
1755 : // either VEX or EVEX prefix shall not have ForceEvex set.
1756 :
1757 : kOpCode_MM_ForceVex3 = 0x04U << kOpCode_MM_Shift, // Force 3-BYTE VEX prefix.
1758 : kOpCode_MM_ForceEvex = 0x10U << kOpCode_MM_Shift, // Force 4-BYTE EVEX prefix.
1759 :
1760 : // FPU_2B - Second-Byte of OpCode used by FPU
1761 : // ------------------------------------------
1762 : //
1763 : // Second byte opcode. This BYTE is ONLY used by FPU instructions and
1764 : // collides with 3 bits from `MM` and 5 bits from 'CDSHL' and 'CDTT'.
1765 : // It's fine as FPU and AVX512 flags are never used at the same time.
1766 : kOpCode_FPU_2B_Shift = 10,
1767 : kOpCode_FPU_2B_Mask = 0xFF << kOpCode_FPU_2B_Shift,
1768 :
1769 : // CDSHL & CDTT
1770 : // ------------
1771 : //
1772 : // Compressed displacement bits.
1773 : //
1774 : // Each opcode defines the base size (N) shift:
1775 : // [0]: BYTE (1 byte).
1776 : // [1]: WORD (2 bytes).
1777 : // [2]: DWORD (4 bytes - float/int32).
1778 : // [3]: QWORD (8 bytes - double/int64).
1779 : // [4]: OWORD (16 bytes - used by FV|FVM|M128).
1780 : //
1781 : // Which is then scaled by the instruction's TT (TupleType) into possible:
1782 : // [5]: YWORD (32 bytes)
1783 : // [6]: ZWORD (64 bytes)
1784 : //
1785 : // These bits are then adjusted before calling EmitModSib or EmitModVSib.
1786 : kOpCode_CDSHL_Shift = 13,
1787 : kOpCode_CDSHL_Mask = 0x7 << kOpCode_CDSHL_Shift,
1788 :
1789 : // Compressed displacement tuple-type (specific to AsmJit).
1790 : //
1791 : // Since we store the base offset independently of CDTT we can simplify the
1792 : // number of 'TUPLE_TYPE' kinds significantly and just handle special cases.
1793 : kOpCode_CDTT_Shift = 16,
1794 : kOpCode_CDTT_Mask = 0x3 << kOpCode_CDTT_Shift,
1795 : kOpCode_CDTT_None = 0x0 << kOpCode_CDTT_Shift, // Does nothing.
1796 : kOpCode_CDTT_ByLL = 0x1 << kOpCode_CDTT_Shift, // Scales by LL (1x 2x 4x).
1797 : kOpCode_CDTT_T1W = 0x2 << kOpCode_CDTT_Shift, // Used to add 'W' to the shift.
1798 : kOpCode_CDTT_DUP = 0x3 << kOpCode_CDTT_Shift, // Special 'VMOVDDUP' case.
1799 :
1800 : // Aliases that match names used in instruction manuals.
1801 : kOpCode_CDTT_FV = kOpCode_CDTT_ByLL,
1802 : kOpCode_CDTT_HV = kOpCode_CDTT_ByLL,
1803 : kOpCode_CDTT_FVM = kOpCode_CDTT_ByLL,
1804 : kOpCode_CDTT_T1S = kOpCode_CDTT_None,
1805 : kOpCode_CDTT_T1F = kOpCode_CDTT_None,
1806 : kOpCode_CDTT_T1_4X = kOpCode_CDTT_None,
1807 : kOpCode_CDTT_T2 = kOpCode_CDTT_None,
1808 : kOpCode_CDTT_T4 = kOpCode_CDTT_None,
1809 : kOpCode_CDTT_T8 = kOpCode_CDTT_None,
1810 : kOpCode_CDTT_HVM = kOpCode_CDTT_ByLL,
1811 : kOpCode_CDTT_QVM = kOpCode_CDTT_ByLL,
1812 : kOpCode_CDTT_OVM = kOpCode_CDTT_ByLL,
1813 : kOpCode_CDTT_128 = kOpCode_CDTT_None,
1814 :
1815 : // `O` Field in MorR/M
1816 : // -------------------
1817 :
1818 : kOpCode_O_Shift = 18,
1819 : kOpCode_O_Mask = 0x07U << kOpCode_O_Shift,
1820 :
1821 : // `PP` and `L` Fields
1822 : // -------------------
1823 : //
1824 : // These fields are stored deliberately right after each other as it makes
1825 : // it easier to construct VEX prefix from the opcode value stored in the
1826 : // instruction database.
1827 : //
1828 : // Two meanings:
1829 : // * "PP" field in AVX/XOP/AVX-512 instruction.
1830 : // * Mandatory Prefix in legacy encoding.
1831 : //
1832 : // AVX reserves 2 bits for `PP` field, but AsmJit extends the storage by 1
1833 : // more bit that is used to emit 9B prefix for some X87-FPU instructions.
1834 :
1835 : kOpCode_PP_Shift = 21,
1836 : kOpCode_PP_VEXMask = 0x03U << kOpCode_PP_Shift, // PP field mask used by VEX/EVEX.
1837 : kOpCode_PP_FPUMask = 0x07U << kOpCode_PP_Shift, // Mask used by EMIT_PP, also includes 0x9B.
1838 : kOpCode_PP_00 = 0x00U << kOpCode_PP_Shift,
1839 : kOpCode_PP_66 = 0x01U << kOpCode_PP_Shift,
1840 : kOpCode_PP_F3 = 0x02U << kOpCode_PP_Shift,
1841 : kOpCode_PP_F2 = 0x03U << kOpCode_PP_Shift,
1842 :
1843 : // AsmJit specific to emit FPU's 9B byte.
1844 : kOpCode_PP_9B = 0x07U << kOpCode_PP_Shift,
1845 :
1846 : // EVEX.W Field
1847 : // ------------
1848 : //
1849 : // `W` field used by EVEX instruction encoding.
1850 :
1851 : kOpCode_EW_Shift = 24,
1852 : kOpCode_EW = 0x01U << kOpCode_EW_Shift,
1853 :
1854 : // REX B|X|R|W Bits
1855 : // ----------------
1856 : //
1857 : // NOTE: REX.[B|X|R] are never stored within the opcode itself, they are
1858 : // reserved by AsmJit are are added dynamically to the opcode to represent
1859 : // [REX|VEX|EVEX].[B|X|R] bits. REX.W can be stored in DB as it's sometimes
1860 : // part of the opcode itself.
1861 :
1862 : // These must be binary compatible with instruction options.
1863 : kOpCode_REX_Shift = 25,
1864 : kOpCode_REX_Mask = 0x0FU << kOpCode_REX_Shift,
1865 : kOpCode_B = 0x01U << kOpCode_REX_Shift, // Never stored in DB.
1866 : kOpCode_X = 0x02U << kOpCode_REX_Shift, // Never stored in DB.
1867 : kOpCode_R = 0x04U << kOpCode_REX_Shift, // Never stored in DB.
1868 : kOpCode_W = 0x08U << kOpCode_REX_Shift,
1869 : kOpCode_W_Shift = kOpCode_REX_Shift + 3,
1870 :
1871 : // `L` field in AVX/XOP/AVX-512
1872 : // ----------------------------
1873 : //
1874 : // VEX/XOP prefix can only use the first bit `L.128` or `L.256`. EVEX prefix
1875 : // prefix makes it possible to use also `L.512`.
1876 : //
1877 : // If the instruction set manual describes an instruction by `LIG` it means
1878 : // that the `L` field is ignored and AsmJit defaults to `0` in such case.
1879 : kOpCode_LL_Shift = 29,
1880 : kOpCode_LL_Mask = 0x03U << kOpCode_LL_Shift,
1881 : kOpCode_LL_128 = 0x00U << kOpCode_LL_Shift,
1882 : kOpCode_LL_256 = 0x01U << kOpCode_LL_Shift,
1883 : kOpCode_LL_512 = 0x02U << kOpCode_LL_Shift
1884 : };
1885 :
1886 : //! Instruction flags.
1887 : //!
1888 : //! Details about instruction encoding, operation, features, and some limitations.
1889 : ASMJIT_ENUM(Flags) {
1890 : kFlagNone = 0x00000000U, //!< No flags.
1891 :
1892 : // Operand's Use
1893 : // -------------
1894 : //
1895 : // These flags describe the use of 1st and/or 1st+2nd operands. This allows
1896 : // to fast calculate which operands are read, written, or read and written.
1897 : //
1898 : // In some cases this information is not reliable, because AsmJit uses data
1899 : // generated by a script that merges usually more than one instruction into
1900 : // one AsmJit instruction as some X86 instructions uses more encodings to
1901 : // describe the same operation. In such case `kFlagUseComplex` is set and
1902 : // AsmJit will use different approach to calculate operand's use flags.
1903 :
1904 : kFlagUseA = 0x00000001U, //!< Use flags are 'A'mbiguous as USE information couldn't be flattened.
1905 : kFlagUseR = 0x00000002U, //!< 1st operand is R (read), read-only if `kFlagOpW` isn't set.
1906 : kFlagUseW = 0x00000004U, //!< 1st operand is W (written), write-only if `kFlagOpR` isn't set.
1907 : kFlagUseX = 0x00000006U, //!< 1st operand is X (read-write).
1908 : kFlagUseXX = 0x00000008U, //!< 1st and 2nd operands are XX (read & written) (XCHG, XADD).
1909 :
1910 : kFlagFixedReg = 0x00000010U, //!< Some operand uses fixed register.
1911 : kFlagFixedMem = 0x00000020U, //!< Some operand uses fixed register to access memory (EAX|RAX, EDI|RDI, ESI|RSI).
1912 : kFlagFixedRM = 0x00000030U, //!< Combination of `kFlagUseFixedReg` and `kFlagUseFixedMem`.
1913 :
1914 : // Instruction Family
1915 : // ------------------
1916 : //
1917 : // Instruction family information.
1918 :
1919 : kFlagFpu = 0x00000100U, //!< Instruction that accesses FPU registers.
1920 : kFlagMmx = 0x00000200U, //!< Instruction that accesses MMX registers (including 3DNOW and GEODE) and EMMS.
1921 : kFlagVec = 0x00000400U, //!< Instruction that accesses XMM registers (SSE, AVX, AVX512).
1922 :
1923 : // Prefixes and Encoding Flags
1924 : // ---------------------------
1925 : //
1926 : // These describe optional X86 prefixes that can be used to change the instruction's operation.
1927 :
1928 : kFlagRep = 0x00001000U, //!< Instruction can be prefixed by using the REP/REPZ/REPE prefix.
1929 : kFlagRepnz = 0x00002000U, //!< Instruction can be prefixed by using the REPNZ/REPNE prefix.
1930 : kFlagLock = 0x00004000U, //!< Instruction can be prefixed by using the LOCK prefix.
1931 : kFlagXAcquire = 0x00008000U, //!< Instruction can be prefixed by using the XACQUIRE prefix.
1932 : kFlagXRelease = 0x00010000U, //!< Instruction can be prefixed by using the XRELEASE prefix.
1933 : kFlagMib = 0x00020000U, //!< Instruction uses MIB (BNDLDX|BNDSTX) to encode two registers.
1934 : kFlagVsib = 0x00040000U, //!< Instruction uses VSIB instead of legacy SIB.
1935 : kFlagVex = 0x00080000U, //!< Instruction can be encoded by VEX|XOP (AVX|AVX2|BMI|XOP|...).
1936 : kFlagEvex = 0x00100000U, //!< Instruction can be encoded by EVEX (AVX512).
1937 :
1938 : // FPU Flags
1939 : // ---------
1940 : //
1941 : // Used to tell the encoder which memory operand sizes are encodable.
1942 :
1943 : kFlagFpuM16 = 0x00200000U, //!< FPU instruction can address `word_ptr` (shared with M10).
1944 : kFlagFpuM32 = 0x00400000U, //!< FPU instruction can address `dword_ptr`.
1945 : kFlagFpuM64 = 0x00800000U, //!< FPU instruction can address `qword_ptr`.
1946 : kFlagFpuM80 = 0x00200000U, //!< FPU instruction can address `tword_ptr` (shared with M2).
1947 :
1948 : // AVX and AVX515 Flags
1949 : // --------------------
1950 : //
1951 : // If both `kFlagPrefixVex` and `kFlagPrefixEvex` flags are specified it
1952 : // means that the instructions can be encoded by either VEX or EVEX prefix.
1953 : // In that case AsmJit checks global options and also instruction options
1954 : // to decide whether to emit VEX or EVEX prefix.
1955 :
1956 : kFlagAvx512_ = 0x00000000U, //!< Internally used in tables, has no meaning.
1957 : kFlagAvx512K = 0x01000000U, //!< Supports masking {k0..k7}.
1958 : kFlagAvx512Z = 0x02000000U, //!< Supports zeroing {z}, must be used together with `kAvx512k`.
1959 : kFlagAvx512ER = 0x04000000U, //!< Supports 'embedded-rounding' {er} with implicit {sae},
1960 : kFlagAvx512SAE = 0x08000000U, //!< Supports 'suppress-all-exceptions' {sae}.
1961 : kFlagAvx512B32 = 0x10000000U, //!< Supports 32-bit broadcast 'b32'.
1962 : kFlagAvx512B64 = 0x20000000U, //!< Supports 64-bit broadcast 'b64'.
1963 : kFlagAvx512T4X = 0x80000000U, //!< Operates on a vector of consecutive registers (AVX512_4FMAPS and AVX512_4VNNIW).
1964 :
1965 : // Combinations used by instruction tables to make AVX512 definitions more compact.
1966 : kFlagAvx512KZ = kFlagAvx512K | kFlagAvx512Z,
1967 : kFlagAvx512ER_SAE = kFlagAvx512ER | kFlagAvx512SAE,
1968 : kFlagAvx512KZ_SAE = kFlagAvx512KZ | kFlagAvx512SAE,
1969 : kFlagAvx512KZ_SAE_B32 = kFlagAvx512KZ_SAE | kFlagAvx512B32,
1970 : kFlagAvx512KZ_SAE_B64 = kFlagAvx512KZ_SAE | kFlagAvx512B64,
1971 :
1972 : kFlagAvx512KZ_ER_SAE = kFlagAvx512KZ | kFlagAvx512ER_SAE,
1973 : kFlagAvx512KZ_ER_SAE_B32 = kFlagAvx512KZ_ER_SAE | kFlagAvx512B32,
1974 : kFlagAvx512KZ_ER_SAE_B64 = kFlagAvx512KZ_ER_SAE | kFlagAvx512B64,
1975 :
1976 : kFlagAvx512K_B32 = kFlagAvx512K | kFlagAvx512B32,
1977 : kFlagAvx512K_B64 = kFlagAvx512K | kFlagAvx512B64,
1978 : kFlagAvx512KZ_B32 = kFlagAvx512KZ | kFlagAvx512B32,
1979 : kFlagAvx512KZ_B64 = kFlagAvx512KZ | kFlagAvx512B64
1980 : };
1981 :
1982 : //! Used to describe what the instruction does and some of its quirks.
1983 : enum OperationFlags {
1984 : kOperationMovCrDr = 0x00000001U, //!< `MOV REG <-> CREG|DREG` - OS|SF|ZF|AF|PF|CF flags are undefined.
1985 : kOperationMovSsSd = 0x00000002U, //!< `MOVSS|MOVSD XMM, [MEM]` - Sestination operand is completely overwritten.
1986 :
1987 : kOperationPrefetch = 0x10000000U, //!< Instruction does hardware prefetch.
1988 : kOperationBarrier = 0x20000000U, //!< Instruction acts as a barrier / fence.
1989 : kOperationVolatile = 0x40000000U, //!< Hint for instruction schedulers to never reorder this instruction (side effects, memory barrier, etc).
1990 : kOperationPrivileged = 0x80000000U //!< This is a privileged operation that cannot run in user mode (system instruction).
1991 : };
1992 :
1993 : //! SSE to AVX conversion mode.
1994 : enum SseToAvxMode {
1995 : kSseToAvxNone = 0, //!< No conversion possible.
1996 : kSseToAvxMove = 1, //!< No change (no operands changed).
1997 : kSseToAvxMoveIfMem = 2, //!< No change if the second operand is mem, extend otherwise.
1998 : kSseToAvxExtend = 3, //!< The first SSE operand becomes first and second AVX operand.
1999 : kSseToAvxBlend = 4 //!< Special case for 'vblendvpd', 'vblendvps', and 'vpblendvb'.
2000 : };
2001 :
2002 : //! Instruction options (AsmJit specific).
2003 : ASMJIT_ENUM(Options) {
2004 : // NOTE: Don't collide with reserved bits used by CodeEmitter (0x0000003F).
2005 : kOptionOp4Op5Used = CodeEmitter::kOptionOp4Op5Used,
2006 :
2007 : kOptionShortForm = 0x00000040U, //!< Emit short-form of the instruction.
2008 : kOptionLongForm = 0x00000080U, //!< Emit long-form of the instruction.
2009 :
2010 : kOptionTaken = 0x00000100U, //!< Conditional jump is likely to be taken.
2011 : kOptionNotTaken = 0x00000200U, //!< Conditional jump is unlikely to be taken.
2012 :
2013 : kOptionVex3 = 0x00000400U, //!< Use 3-byte VEX prefix if possible (AVX) (must be 0x00000400).
2014 : kOptionModMR = 0x00000800U, //!< Use ModMR instead of ModRM when it's available.
2015 : kOptionEvex = 0x00001000U, //!< Use 4-byte EVEX prefix if possible (AVX-512) (must be 0x00001000).
2016 :
2017 : kOptionLock = 0x00002000U, //!< LOCK prefix (lock-enabled instructions only).
2018 : kOptionRep = 0x00004000U, //!< REP/REPZ prefix (string instructions only).
2019 : kOptionRepnz = 0x00008000U, //!< REPNZ prefix (string instructions only).
2020 :
2021 : kOptionXAcquire = 0x00010000U, //!< XACQUIRE prefix (only allowed instructions).
2022 : kOptionXRelease = 0x00020000U, //!< XRELEASE prefix (only allowed instructions).
2023 :
2024 : kOptionER = 0x00040000U, //!< AVX-512: 'embedded-rounding' {er} and {sae}.
2025 : kOptionSAE = 0x00080000U, //!< AVX-512: 'suppress-all-exceptions' {sae}.
2026 : kOption1ToX = 0x00100000U, //!< AVX-512: broadcast the first element to all {1tox}.
2027 : kOptionRN_SAE = 0x00000000U, //!< AVX-512: round-to-nearest (even) {rn-sae} (bits 00).
2028 : kOptionRD_SAE = 0x00200000U, //!< AVX-512: round-down (toward -inf) {rd-sae} (bits 01).
2029 : kOptionRU_SAE = 0x00400000U, //!< AVX-512: round-up (toward +inf) {ru-sae} (bits 10).
2030 : kOptionRZ_SAE = 0x00600000U, //!< AVX-512: round-toward-zero (truncate) {rz-sae} (bits 11).
2031 : kOptionZMask = 0x00800000U, //!< AVX-512: Use zeroing {k}{z} instead of merging {k}.
2032 : _kOptionAvx512Mask = 0x00FC0000U, //!< AVX-512: Mask of all possible AVX-512 options except EVEX prefix flag.
2033 :
2034 : _kOptionInvalidRex = 0x01000000U, //!< REX prefix can't be emitted (internal).
2035 : kOptionOpCodeB = 0x02000000U, //!< REX.B and/or VEX.B field (X64).
2036 : kOptionOpCodeX = 0x04000000U, //!< REX.X and/or VEX.X field (X64).
2037 : kOptionOpCodeR = 0x08000000U, //!< REX.R and/or VEX.R field (X64).
2038 : kOptionOpCodeW = 0x10000000U, //!< REX.W and/or VEX.W field (X64).
2039 : kOptionRex = 0x80000000U //!< Use REX prefix (X64) (must be 0x80000000).
2040 : };
2041 :
2042 : //! Supported architectures.
2043 : ASMJIT_ENUM(ArchMask) {
2044 : kArchMaskX86 = 0x01, //!< X86 mode supported.
2045 : kArchMaskX64 = 0x02 //!< X64 mode supported.
2046 : };
2047 :
2048 : ASMJIT_ENUM(SingleRegCase) {
2049 : kSingleRegNone = 0, //!< No special handling.
2050 : kSingleRegRO = 1, //!< Operands become read-only - `REG & REG` and similar.
2051 : kSingleRegWO = 2 //!< Operands become write-only - `REG ^ REG` and similar.
2052 : };
2053 :
2054 : //! Instruction's operand flags.
2055 : ASMJIT_ENUM(OpFlags) {
2056 : kOpNone = 0x00000000U, //!< No operand.
2057 :
2058 : kOpGpbLo = 0x00000001U, //!< Operand can be a low 8-bit GPB register.
2059 : kOpGpbHi = 0x00000002U, //!< Operand can be a high 8-bit GPB register.
2060 : kOpGpw = 0x00000004U, //!< Operand can be a 16-bit GPW register.
2061 : kOpGpd = 0x00000008U, //!< Operand can be a 32-bit GPD register.
2062 : kOpGpq = 0x00000010U, //!< Operand can be a 64-bit GPQ register.
2063 : kOpFp = 0x00000020U, //!< Operand can be an FPU register.
2064 : kOpMm = 0x00000040U, //!< Operand can be a 64-bit MM register.
2065 : kOpK = 0x00000080U, //!< Operand can be a 64-bit K register.
2066 : kOpCr = 0x00000100U, //!< Operand can be a control register.
2067 : kOpDr = 0x00000200U, //!< Operand can be a debug register.
2068 : kOpBnd = 0x00000400U, //!< Operand can be a BND register.
2069 : kOpSeg = 0x00000800U, //!< Operand can be a segment register.
2070 : kOpXmm = 0x00001000U, //!< Operand can be a 128-bit XMM register.
2071 : kOpYmm = 0x00002000U, //!< Operand can be a 256-bit YMM register.
2072 : kOpZmm = 0x00004000U, //!< Operand can be a 512-bit ZMM register.
2073 :
2074 : kOpAllRegs = 0x00007FFFU, //!< Combination of all possible registers.
2075 :
2076 : kOpMem = 0x00010000U, //!< Operand can be a scalar memory pointer.
2077 : kOpVm = 0x00020000U, //!< Operand can be a vector memory pointer.
2078 :
2079 : kOpU4 = 0x00040000U, //!< Operand can be unsigned 4-bit immediate.
2080 : kOpI8 = 0x00080000U, //!< Operand can be signed 8-bit immediate.
2081 : kOpU8 = 0x00100000U, //!< Operand can be unsigned 8-bit immediate.
2082 : kOpI16 = 0x00200000U, //!< Operand can be signed 16-bit immediate.
2083 : kOpU16 = 0x00400000U, //!< Operand can be unsigned 16-bit immediate.
2084 : kOpI32 = 0x00800000U, //!< Operand can be signed 32-bit immediate.
2085 : kOpU32 = 0x01000000U, //!< Operand can be unsigned 32-bit immediate.
2086 : kOpI64 = 0x02000000U, //!< Operand can be signed 64-bit immediate.
2087 : kOpU64 = 0x04000000U, //!< Operand can be unsigned 64-bit immediate.
2088 : kOpAllImm = 0x07FC0000U, //!< Operand can be any immediate.
2089 :
2090 : kOpRel8 = 0x08000000U, //!< Operand can be relative 8-bit displacement.
2091 : kOpRel32 = 0x10000000U, //!< Operand can be relative 32-bit displacement.
2092 :
2093 : kOpR = 0x20000000U, //!< Operand is read.
2094 : kOpW = 0x40000000U, //!< Operand is written.
2095 : kOpX = 0x60000000U, //!< Operand is read & written.
2096 : kOpImplicit = 0x80000000U //!< Operand is implicit.
2097 : };
2098 :
2099 : //! Instruction's memory operand flags.
2100 : ASMJIT_ENUM(MemOpFlags) {
2101 : // NOTE: Instruction uses either scalar or vector memory operands, they
2102 : // never collide, this is the reason "M" and "Vm" can share bits here.
2103 :
2104 : kMemOpM8 = 0x0001U, //!< Operand can be an 8-bit memory pointer.
2105 : kMemOpM16 = 0x0002U, //!< Operand can be a 16-bit memory pointer.
2106 : kMemOpM32 = 0x0004U, //!< Operand can be a 32-bit memory pointer.
2107 : kMemOpM48 = 0x0008U, //!< Operand can be a 32-bit memory pointer.
2108 : kMemOpM64 = 0x0010U, //!< Operand can be a 64-bit memory pointer.
2109 : kMemOpM80 = 0x0020U, //!< Operand can be an 80-bit memory pointer.
2110 : kMemOpM128 = 0x0040U, //!< Operand can be a 128-bit memory pointer.
2111 : kMemOpM256 = 0x0080U, //!< Operand can be a 256-bit memory pointer.
2112 : kMemOpM512 = 0x0100U, //!< Operand can be a 512-bit memory pointer.
2113 : kMemOpM1024 = 0x0200U, //!< Operand can be a 1024-bit memory pointer.
2114 :
2115 : kMemOpVm32x = 0x0001U, //!< Operand can be a vm32x (vector) pointer.
2116 : kMemOpVm32y = 0x0002U, //!< Operand can be a vm32y (vector) pointer.
2117 : kMemOpVm32z = 0x0004U, //!< Operand can be a vm32z (vector) pointer.
2118 : kMemOpVm64x = 0x0010U, //!< Operand can be a vm64x (vector) pointer.
2119 : kMemOpVm64y = 0x0020U, //!< Operand can be a vm64y (vector) pointer.
2120 : kMemOpVm64z = 0x0040U, //!< Operand can be a vm64z (vector) pointer.
2121 :
2122 : kMemOpBaseOnly = 0x0800U, //!< Only memory base is allowed (no index, no offset).
2123 : kMemOpDs = 0x1000U, //!< Implicit memory operand's DS segment.
2124 : kMemOpEs = 0x2000U, //!< Implicit memory operand's ES segment.
2125 :
2126 : kMemOpMib = 0x4000U, //!< Operand must be MIB (base+index) pointer.
2127 : kMemOpAny = 0x8000U //!< Operand can be any scalar memory pointer.
2128 : };
2129 :
2130 : //! Instruction signature.
2131 : //!
2132 : //! Contains a sequence of operands' combinations and other metadata that defines
2133 : //! a single instruction. This data is used by instruction validator.
2134 : struct ISignature {
2135 : uint8_t opCount : 3; //!< Count of operands in `opIndex` (0..6).
2136 : uint8_t archMask : 2; //!< Architecture mask of this record.
2137 : uint8_t implicit : 3; //!< Number of implicit operands.
2138 : uint8_t reserved; //!< Reserved for future use.
2139 : uint8_t operands[6]; //!< Indexes to `OSignature` table.
2140 : };
2141 :
2142 : //! Operand signature, used by \ref ISignature.
2143 : //!
2144 : //! Contains all possible operand combinations, memory size information,
2145 : //! and register index (or \ref Globals::kInvalidRegId if not mandatory).
2146 : struct OSignature {
2147 : uint32_t flags; //!< Operand flags.
2148 : uint16_t memFlags; //!< Memory flags.
2149 : uint8_t extFlags; //!< Extra flags.
2150 : uint8_t regMask; //!< Mask of possible register IDs.
2151 : };
2152 :
2153 : //! Common data - aggregated data that is shared across many instructions.
2154 : struct CommonData {
2155 : //! Get all instruction flags, see \ref X86Inst::Flags.
2156 416065 : ASMJIT_INLINE uint32_t getFlags() const noexcept { return _flags; }
2157 : //! Get if the instruction has a `flag`, see \ref X86Inst::Flags.
2158 955474 : ASMJIT_INLINE bool hasFlag(uint32_t flag) const noexcept { return (_flags & flag) != 0; }
2159 :
2160 : //! Get if 1st operand is read-only.
2161 : ASMJIT_INLINE bool isUseR() const noexcept { return (getFlags() & kFlagUseX) == kFlagUseR; }
2162 : //! Get if 1st operand is write-only.
2163 416065 : ASMJIT_INLINE bool isUseW() const noexcept { return (getFlags() & kFlagUseX) == kFlagUseW; }
2164 : //! Get if 1st operand is read-write.
2165 : ASMJIT_INLINE bool isUseX() const noexcept { return (getFlags() & kFlagUseX) == kFlagUseX; }
2166 : //! Get if 1st and 2nd operands are read-write.
2167 : ASMJIT_INLINE bool isUseXX() const noexcept { return hasFlag(kFlagUseXX); }
2168 :
2169 : ASMJIT_INLINE bool hasFixedReg() const noexcept { return hasFlag(kFlagFixedReg); }
2170 : ASMJIT_INLINE bool hasFixedMem() const noexcept { return hasFlag(kFlagFixedMem); }
2171 : ASMJIT_INLINE bool hasFixedRM() const noexcept { return hasFlag(kFlagFixedRM); }
2172 :
2173 : //! Get if the instruction is FPU instruction.
2174 : ASMJIT_INLINE bool isFpu() const noexcept { return hasFlag(kFlagFpu); }
2175 : //! Get if the instruction is MMX|3DNOW instruction that accesses MMX registers (includes EMMS).
2176 : ASMJIT_INLINE bool isMmx() const noexcept { return hasFlag(kFlagMmx); }
2177 :
2178 : //! Get if the instruction is SSE|AVX|AVX512 instruction that accesses XMM|YMM|ZMM registers (includes VZEROALL|VZEROUPPER).
2179 : ASMJIT_INLINE bool isVec() const noexcept { return hasFlag(kFlagVec); }
2180 : //! Get if the instruction is SSE+ (SSE4.2, AES, SHA included) instruction that accesses XMM registers.
2181 : ASMJIT_INLINE bool isSse() const noexcept { return (getFlags() & (kFlagVec | kFlagVex | kFlagEvex)) == kFlagVec; }
2182 : //! Get if the instruction is AVX+ (FMA included) instruction that accesses XMM|YMM|ZMM registers.
2183 : ASMJIT_INLINE bool isAvx() const noexcept { return isVec() && isVexOrEvex(); }
2184 :
2185 : //! Get if the instruction can be prefixed by LOCK prefix.
2186 : ASMJIT_INLINE bool isLockEnabled() const noexcept { return hasFlag(kFlagLock); }
2187 : //! Get if the instruction can be prefixed by REP prefix.
2188 : ASMJIT_INLINE bool isRepEnabled() const noexcept { return hasFlag(kFlagRep); }
2189 : //! Get if the instruction can be prefixed by REPZ prefix.
2190 : ASMJIT_INLINE bool isRepzEnabled() const noexcept { return hasFlag(kFlagRep); }
2191 : //! Get if the instruction can be prefixed by REPNZ prefix.
2192 : ASMJIT_INLINE bool isRepnzEnabled() const noexcept { return hasFlag(kFlagRepnz); }
2193 :
2194 : //! Get if the instruction uses MIB.
2195 : ASMJIT_INLINE bool isMibOp() const noexcept { return hasFlag(kFlagMib); }
2196 : //! Get if the instruction uses VSIB.
2197 : ASMJIT_INLINE bool isVsibOp() const noexcept { return hasFlag(kFlagVsib); }
2198 : //! Get if the instruction uses VEX (can be set together with EVEX if both are encodable).
2199 : ASMJIT_INLINE bool isVex() const noexcept { return hasFlag(kFlagVex); }
2200 : //! Get if the instruction uses EVEX (can be set together with VEX if both are encodable).
2201 : ASMJIT_INLINE bool isEvex() const noexcept { return hasFlag(kFlagEvex); }
2202 : //! Get if the instruction uses VEX and/or EVEX.
2203 : ASMJIT_INLINE bool isVexOrEvex() const noexcept { return hasFlag(kFlagVex | kFlagEvex); }
2204 :
2205 : //! Get if the instruction supports AVX512 masking {k}.
2206 : ASMJIT_INLINE bool hasAvx512K() const noexcept { return hasFlag(kFlagAvx512K); }
2207 : //! Get if the instruction supports AVX512 zeroing {k}{z}.
2208 : ASMJIT_INLINE bool hasAvx512Z() const noexcept { return hasFlag(kFlagAvx512Z); }
2209 : //! Get if the instruction supports AVX512 embedded-rounding {er}.
2210 : ASMJIT_INLINE bool hasAvx512ER() const noexcept { return hasFlag(kFlagAvx512ER); }
2211 : //! Get if the instruction supports AVX512 suppress-all-exceptions {sae}.
2212 : ASMJIT_INLINE bool hasAvx512SAE() const noexcept { return hasFlag(kFlagAvx512SAE); }
2213 : //! Get if the instruction supports AVX512 broadcast (either 32-bit or 64-bit).
2214 : ASMJIT_INLINE bool hasAvx512B() const noexcept { return hasFlag(kFlagAvx512B32 | kFlagAvx512B64); }
2215 : //! Get if the instruction supports AVX512 broadcast (32-bit).
2216 : ASMJIT_INLINE bool hasAvx512B32() const noexcept { return hasFlag(kFlagAvx512B32); }
2217 : //! Get if the instruction supports AVX512 broadcast (64-bit).
2218 : ASMJIT_INLINE bool hasAvx512B64() const noexcept { return hasFlag(kFlagAvx512B64); }
2219 :
2220 : //! Get if the instruction may or will jump (returns true also for calls and returns).
2221 : ASMJIT_INLINE bool doesJump() const noexcept { return _jumpType != Inst::kJumpTypeNone; }
2222 :
2223 : //! Get the destination index of WRITE operation.
2224 : ASMJIT_INLINE uint32_t getWriteIndex() const noexcept { return _writeIndex; }
2225 : //! Get the number of bytes that will be written by a WRITE operation.
2226 : //!
2227 : //! This information is required by a liveness analysis to mark virtual
2228 : //! registers dead even if the instruction doesn't completely overwrite
2229 : //! the whole register. If the analysis keeps which bytes are completely
2230 : //! overwritten by the instruction it can find the where a register becomes
2231 : //! dead by simply checking if the instruction overwrites all remaining
2232 : //! bytes.
2233 299404 : ASMJIT_INLINE uint32_t getWriteSize() const noexcept { return _writeSize; }
2234 :
2235 : //! Get if the instruction has alternative opcode.
2236 0 : ASMJIT_INLINE bool hasAltOpCode() const noexcept { return _altOpCodeIndex != 0; }
2237 : //! Get alternative opcode, see \ref OpCodeBits.
2238 : ASMJIT_INLINE uint32_t getAltOpCode() const noexcept;
2239 :
2240 : ASMJIT_INLINE uint32_t getISignatureIndex() const noexcept { return _iSignatureIndex; }
2241 : ASMJIT_INLINE uint32_t getISignatureCount() const noexcept { return _iSignatureCount; }
2242 :
2243 : ASMJIT_INLINE const ISignature* getISignatureData() const noexcept;
2244 : ASMJIT_INLINE const ISignature* getISignatureEnd() const noexcept;
2245 :
2246 : ASMJIT_INLINE uint32_t getJumpType() const noexcept { return _jumpType; }
2247 : ASMJIT_INLINE uint32_t getSingleRegCase() const noexcept { return _singleRegCase; }
2248 :
2249 : uint32_t _flags; //!< Instruction flags.
2250 : uint32_t _writeIndex : 8; //!< First DST byte of a WRITE operation (default 0).
2251 : uint32_t _writeSize :24; //!< Number of bytes to be written in DST.
2252 :
2253 : uint32_t _altOpCodeIndex : 8; //!< Index to table with alternative opcodes.
2254 : uint32_t _iSignatureIndex :10; //!< First `ISignature` entry in the database.
2255 : uint32_t _iSignatureCount : 4; //!< Number of relevant `ISignature` entries.
2256 : uint32_t _jumpType : 3; //!< Jump type, see `Inst::JumpType`.
2257 : uint32_t _singleRegCase : 2; //!< Specifies what happens if all source operands share the same register.
2258 : uint32_t _reserved : 5; //!< \internal
2259 : };
2260 :
2261 : //! Detailed data about instruction's operation, requirements, and side-effects.
2262 : struct OperationData {
2263 : ASMJIT_INLINE uint32_t getOperationFlags() const noexcept { return _flags; }
2264 83303 : ASMJIT_INLINE bool hasOperationFlag(uint32_t flag) const noexcept { return (_flags & flag) != 0; }
2265 :
2266 : ASMJIT_INLINE bool isMovCrDr() const noexcept { return hasOperationFlag(kOperationMovCrDr); }
2267 : ASMJIT_INLINE bool isMovSsSd() const noexcept { return hasOperationFlag(kOperationMovSsSd); }
2268 :
2269 : ASMJIT_INLINE bool isPrefetch() const noexcept { return hasOperationFlag(kOperationPrefetch); }
2270 : ASMJIT_INLINE bool isBarrier() const noexcept { return hasOperationFlag(kOperationBarrier); }
2271 : ASMJIT_INLINE bool isVolatile() const noexcept { return hasOperationFlag(kOperationVolatile); }
2272 : ASMJIT_INLINE bool isPrivileged() const noexcept { return hasOperationFlag(kOperationPrivileged); }
2273 :
2274 : ASMJIT_INLINE bool hasFeature(uint32_t feature) const noexcept {
2275 : for (uint32_t i = 0; i < ASMJIT_ARRAY_SIZE(_features); i++)
2276 : if (feature == _features[i])
2277 : return true;
2278 : return false;
2279 : }
2280 :
2281 : ASMJIT_INLINE uint32_t getSpecialRegsR() const noexcept { return _specialRegsR; }
2282 : ASMJIT_INLINE uint32_t getSpecialRegsW() const noexcept { return _specialRegsW; }
2283 :
2284 0 : ASMJIT_INLINE const uint8_t* getFeaturesData() const noexcept { return _features; }
2285 0 : ASMJIT_INLINE const uint8_t* getFeaturesEnd() const noexcept { return _features + ASMJIT_ARRAY_SIZE(_features); }
2286 :
2287 : uint32_t _flags; //!< Operation flags.
2288 : uint8_t _features[4]; //!< Features vector (max 4 features).
2289 : uint32_t _specialRegsR; //!< Special registers read.
2290 : uint32_t _specialRegsW; //!< Special registers written.
2291 : };
2292 :
2293 : //! Contains data that can be used to convert SSE to AVX (or back).
2294 : struct SseToAvxData {
2295 : ASMJIT_INLINE uint32_t getMode() const noexcept { return _mode; }
2296 : ASMJIT_INLINE int32_t getDelta() const noexcept { return _delta; }
2297 :
2298 : uint16_t _mode : 3; //!< SSE to AVX conversion mode, see \ref AvxConvMode.
2299 : int16_t _delta : 13; //!< Delta to get a corresponding AVX instruction.
2300 : };
2301 :
2302 : //! Data that is not related to a specific X86 instruction (not referenced by
2303 : //! any tables).
2304 : struct MiscData {
2305 : uint32_t condToJcc[x86::kCondCount];
2306 : uint32_t condToSetcc[x86::kCondCount];
2307 : uint32_t condToCmovcc[x86::kCondCount];
2308 : uint32_t reversedCond[x86::kCondCount];
2309 : };
2310 :
2311 : // --------------------------------------------------------------------------
2312 : // [Accessors]
2313 : // --------------------------------------------------------------------------
2314 :
2315 : //! Get instruction name (null terminated).
2316 : //!
2317 : //! NOTE: If AsmJit was compiled with `ASMJIT_DISABLE_TEXT` then this will
2318 : //! return an empty string (null terminated string of zero length).
2319 : ASMJIT_INLINE const char* getName() const noexcept;
2320 : //! Get index to `X86InstDB::nameData` of this instruction.
2321 : //!
2322 : //! NOTE: If AsmJit was compiled with `ASMJIT_DISABLE_TEXT` then this will
2323 : //! always return zero.
2324 0 : ASMJIT_INLINE uint32_t getNameDataIndex() const noexcept { return _nameDataIndex; }
2325 :
2326 : //! Get \ref CommonData of the instruction.
2327 : ASMJIT_INLINE const CommonData& getCommonData() const noexcept;
2328 : //! Get index to `X86InstDB::commonData` of this instruction.
2329 : ASMJIT_INLINE uint32_t getCommonDataIndex() const noexcept { return _commonDataIndex; }
2330 :
2331 : //! Get \ref OperationData of the instruction.
2332 : ASMJIT_INLINE const OperationData& getOperationData() const noexcept;
2333 : //! Get index to `X86InstDB::operationData` of this instruction.
2334 : ASMJIT_INLINE uint32_t getOperationDataIndex() const noexcept { return _operationDataIndex; }
2335 :
2336 : //! Get data that can be used to convert SSE instruction to AVX (or back).
2337 : ASMJIT_INLINE const SseToAvxData& getSseToAvxData() const noexcept;
2338 : //! Get index to `X86InstDB::sseToAvxData` of this instruction.
2339 : ASMJIT_INLINE uint32_t getSseToAvxDataIndex() const noexcept { return _sseToAvxDataIndex; }
2340 :
2341 : //! Get instruction encoding, see \ref EncodingType.
2342 593300 : ASMJIT_INLINE uint32_t getEncodingType() const noexcept { return _encodingType; }
2343 :
2344 : //! Get if the instruction has main opcode (rare, but it's possible it doesn't have).
2345 : ASMJIT_INLINE bool hasMainOpCode() const noexcept { return _mainOpCode != 0; }
2346 : //! Get main opcode, see \ref OpCodeBits.
2347 593300 : ASMJIT_INLINE uint32_t getMainOpCode() const noexcept { return _mainOpCode; }
2348 :
2349 : //! Get if the instruction has alternative opcode.
2350 : ASMJIT_INLINE bool hasAltOpCode() const noexcept { return getCommonData().hasAltOpCode(); }
2351 : //! Get alternative opcode, see \ref OpCodeBits.
2352 : ASMJIT_INLINE uint32_t getAltOpCode() const noexcept { return getCommonData().getAltOpCode(); }
2353 :
2354 : //! Get if the instruction has flag `flag`, see \ref Flags.
2355 : ASMJIT_INLINE bool hasFlag(uint32_t flag) const noexcept { return getCommonData().hasFlag(flag); }
2356 : //! Get instruction flags, see \ref Flags.
2357 : ASMJIT_INLINE uint32_t getFlags() const noexcept { return getCommonData().getFlags(); }
2358 :
2359 : //! Get if the instruction is FPU instruction.
2360 : ASMJIT_INLINE bool isFpu() const noexcept { return getCommonData().isFpu(); }
2361 : //! Get if the instruction is MMX instruction that accesses MMX registersm, including EMMS.
2362 : ASMJIT_INLINE bool isMmx() const noexcept { return getCommonData().isMmx(); }
2363 :
2364 : //! Get if the instruction is SSE|AVX|AVX512 instruction that accesses XMM|YMM|ZMM registers.
2365 : ASMJIT_INLINE bool isVec() const noexcept { return getCommonData().isVec(); }
2366 : //! Get if the instruction is SSE+ (SSE4.2, AES, SHA included) instruction that accesses XMM registers.
2367 : ASMJIT_INLINE bool isSse() const noexcept { return getCommonData().isSse(); }
2368 : //! Get if the instruction is AVX+ (FMA included) instruction that accesses XMM|YMM|ZMM registers.
2369 : ASMJIT_INLINE bool isAvx() const noexcept { return getCommonData().isAvx(); }
2370 :
2371 : //! Get if the instruction can be prefixed by LOCK prefix.
2372 : ASMJIT_INLINE bool isLockEnabled() const noexcept { return getCommonData().isLockEnabled(); }
2373 : //! Get if the instruction can be prefixed by REP prefix.
2374 : ASMJIT_INLINE bool isRepEnabled() const noexcept { return getCommonData().isRepEnabled(); }
2375 : //! Get if the instruction can be prefixed by REPZ prefix.
2376 : ASMJIT_INLINE bool isRepzEnabled() const noexcept { return getCommonData().isRepzEnabled(); }
2377 : //! Get if the instruction can be prefixed by REPNZ prefix.
2378 : ASMJIT_INLINE bool isRepnzEnabled() const noexcept { return getCommonData().isRepnzEnabled(); }
2379 :
2380 : //! Get if the instruction uses MIB.
2381 : ASMJIT_INLINE bool isMibOp() const noexcept { return getCommonData().isMibOp(); }
2382 : //! Get if the instruction uses VSIB.
2383 : ASMJIT_INLINE bool isVsibOp() const noexcept { return getCommonData().isVsibOp(); }
2384 : //! Get if the instruction uses VEX (can be set together with EVEX if both are encodable).
2385 : ASMJIT_INLINE bool isVex() const noexcept { return getCommonData().isVex(); }
2386 : //! Get if the instruction uses EVEX (can be set together with VEX if both are encodable).
2387 : ASMJIT_INLINE bool isEvex() const noexcept { return getCommonData().isEvex(); }
2388 :
2389 : //! Get if the instruction supports AVX512 masking {k}.
2390 : ASMJIT_INLINE bool hasAvx512K() const noexcept { return getCommonData().hasAvx512K(); }
2391 : //! Get if the instruction supports AVX512 zeroing {k}{z}.
2392 : ASMJIT_INLINE bool hasAvx512Z() const noexcept { return getCommonData().hasAvx512Z(); }
2393 : //! Get if the instruction supports AVX512 embedded-rounding {er}.
2394 : ASMJIT_INLINE bool hasAvx512ER() const noexcept { return getCommonData().hasAvx512ER(); }
2395 : //! Get if the instruction supports AVX512 suppress-all-exceptions {sae}.
2396 : ASMJIT_INLINE bool hasAvx512SAE() const noexcept { return getCommonData().hasAvx512SAE(); }
2397 : //! Get if the instruction supports AVX512 broadcast (either 32-bit or 64-bit).
2398 : ASMJIT_INLINE bool hasAvx512B() const noexcept { return getCommonData().hasAvx512B(); }
2399 : //! Get if the instruction supports AVX512 broadcast (32-bit).
2400 : ASMJIT_INLINE bool hasAvx512B32() const noexcept { return getCommonData().hasAvx512B32(); }
2401 : //! Get if the instruction supports AVX512 broadcast (64-bit).
2402 : ASMJIT_INLINE bool hasAvx512B64() const noexcept { return getCommonData().hasAvx512B64(); }
2403 :
2404 : ASMJIT_INLINE uint32_t getISignatureIndex() const noexcept { return getCommonData().getISignatureIndex(); }
2405 : ASMJIT_INLINE uint32_t getISignatureCount() const noexcept { return getCommonData().getISignatureCount(); }
2406 :
2407 : ASMJIT_INLINE const ISignature* getISignatureData() const noexcept { return getCommonData().getISignatureData(); }
2408 : ASMJIT_INLINE const ISignature* getISignatureEnd() const noexcept { return getCommonData().getISignatureEnd(); }
2409 :
2410 : // --------------------------------------------------------------------------
2411 : // [Get]
2412 : // --------------------------------------------------------------------------
2413 :
2414 : //! Get if the `instId` is defined (counts also Inst::kIdNone, which must be zero).
2415 : static ASMJIT_INLINE bool isDefinedId(uint32_t instId) noexcept { return instId < _kIdCount; }
2416 :
2417 : //! Get instruction information based on the instruction `instId`.
2418 : //!
2419 : //! NOTE: `instId` has to be a valid instruction ID, it can't be greater than
2420 : //! or equal to `X86Inst::_kIdCount`. It asserts in debug mode.
2421 : static ASMJIT_INLINE const X86Inst& getInst(uint32_t instId) noexcept;
2422 :
2423 : // --------------------------------------------------------------------------
2424 : // [Utilities]
2425 : // --------------------------------------------------------------------------
2426 :
2427 : static ASMJIT_INLINE const MiscData& getMiscData() noexcept;
2428 :
2429 : //! Get the equivalent of a negated condition code.
2430 : static ASMJIT_INLINE uint32_t negateCond(uint32_t cond) noexcept {
2431 : ASMJIT_ASSERT(cond < x86::kCondCount);
2432 : return cond ^ 1;
2433 : }
2434 :
2435 : //! Convert a condition code into a condition code that reverses the
2436 : //! corresponding operands of a comparison.
2437 : static ASMJIT_INLINE uint32_t reverseCond(uint32_t cond) noexcept {
2438 : ASMJIT_ASSERT(cond < x86::kCondCount);
2439 : return getMiscData().reversedCond[cond];
2440 : }
2441 :
2442 : //! Translate a condition code `cc` to a "cmovcc" instruction id.
2443 : static ASMJIT_INLINE uint32_t condToCmovcc(uint32_t cond) noexcept {
2444 : ASMJIT_ASSERT(cond < x86::kCondCount);
2445 : return getMiscData().condToCmovcc[cond];
2446 : }
2447 :
2448 : //! Translate a condition code `cc` to a "jcc" instruction id.
2449 : static ASMJIT_INLINE uint32_t condToJcc(uint32_t cond) noexcept {
2450 : ASMJIT_ASSERT(cond < x86::kCondCount);
2451 : return getMiscData().condToJcc[cond];
2452 : }
2453 :
2454 : //! Translate a condition code `cc` to a "setcc" instruction id.
2455 : static ASMJIT_INLINE uint32_t condToSetcc(uint32_t cond) noexcept {
2456 : ASMJIT_ASSERT(cond < x86::kCondCount);
2457 : return getMiscData().condToSetcc[cond];
2458 : }
2459 :
2460 : //! Get a 'kmov?' instruction by register `size`.
2461 : static ASMJIT_INLINE uint32_t kmovIdFromSize(uint32_t size) noexcept {
2462 : return size == 1 ? X86Inst::kIdKmovb :
2463 : size == 2 ? X86Inst::kIdKmovw :
2464 : size == 4 ? X86Inst::kIdKmovd : X86Inst::kIdKmovq;
2465 : }
2466 :
2467 : // --------------------------------------------------------------------------
2468 : // [Id <-> Name]
2469 : // --------------------------------------------------------------------------
2470 :
2471 : #if !defined(ASMJIT_DISABLE_TEXT)
2472 : //! Get an instruction ID from a given instruction `name`.
2473 : //!
2474 : //! NOTE: Instruction name MUST BE in lowercase, otherwise there will be no
2475 : //! match. If there is an exact match the instruction id is returned, otherwise
2476 : //! `kInvalidInstId` (zero) is returned instead. The given `name` doesn't have
2477 : //! to be null-terminated if `len` is provided.
2478 : ASMJIT_API static uint32_t getIdByName(const char* name, size_t len = Globals::kInvalidIndex) noexcept;
2479 :
2480 : //! Get an instruction name from a given instruction id `instId`.
2481 : ASMJIT_API static const char* getNameById(uint32_t instId) noexcept;
2482 : #endif // !ASMJIT_DISABLE_TEXT
2483 :
2484 : // --------------------------------------------------------------------------
2485 : // [Members]
2486 : // --------------------------------------------------------------------------
2487 :
2488 : uint32_t _encodingType : 8; //!< Encoding type.
2489 : uint32_t _nameDataIndex : 14; //!< Index to `X86InstDB::nameData` table.
2490 : uint32_t _commonDataIndex : 10; //!< Index to `X86InstDB::commonData` table.
2491 : uint32_t _operationDataIndex : 8; //!< Index to `X86InstDB::operationData` table.
2492 : uint32_t _sseToAvxDataIndex : 7; //!< Index to `X86InstDB::sseToAvxData` table.
2493 : uint32_t _reserved : 17; //!< \internal
2494 : uint32_t _mainOpCode; //!< Instruction's primary opcode.
2495 : };
2496 :
2497 : //! X86 instruction data under a single namespace.
2498 : struct X86InstDB {
2499 : ASMJIT_API static const X86Inst instData[];
2500 : ASMJIT_API static const uint32_t altOpCodeData[];
2501 :
2502 : ASMJIT_API static const X86Inst::CommonData commonData[];
2503 : ASMJIT_API static const X86Inst::OperationData operationData[];
2504 : ASMJIT_API static const X86Inst::SseToAvxData sseToAvxData[];
2505 :
2506 : ASMJIT_API static const char nameData[];
2507 : ASMJIT_API static const X86Inst::MiscData miscData;
2508 :
2509 : #if !defined(ASMJIT_DISABLE_VALIDATION)
2510 : ASMJIT_API static const X86Inst::ISignature iSignatureData[];
2511 : ASMJIT_API static const X86Inst::OSignature oSignatureData[];
2512 : #endif // ASMJIT_DISABLE_VALIDATION
2513 : };
2514 :
2515 : ASMJIT_INLINE const X86Inst& X86Inst::getInst(uint32_t instId) noexcept {
2516 : ASMJIT_ASSERT(instId < X86Inst::_kIdCount);
2517 : return X86InstDB::instData[instId];
2518 : }
2519 :
2520 0 : ASMJIT_INLINE const char* X86Inst::getName() const noexcept { return &X86InstDB::nameData[_nameDataIndex]; }
2521 1041994 : ASMJIT_INLINE const X86Inst::CommonData& X86Inst::getCommonData() const noexcept { return X86InstDB::commonData[_commonDataIndex]; }
2522 83303 : ASMJIT_INLINE const X86Inst::OperationData& X86Inst::getOperationData() const noexcept { return X86InstDB::operationData[_operationDataIndex]; }
2523 : ASMJIT_INLINE const X86Inst::SseToAvxData& X86Inst::getSseToAvxData() const noexcept { return X86InstDB::sseToAvxData[_sseToAvxDataIndex]; }
2524 54806 : ASMJIT_INLINE uint32_t X86Inst::CommonData::getAltOpCode() const noexcept { return X86InstDB::altOpCodeData[_altOpCodeIndex]; }
2525 : ASMJIT_INLINE const X86Inst::MiscData& X86Inst::getMiscData() noexcept { return X86InstDB::miscData; }
2526 :
2527 : #if !defined(ASMJIT_DISABLE_VALIDATION)
2528 : ASMJIT_INLINE const X86Inst::ISignature* X86Inst::CommonData::getISignatureData() const noexcept { return X86InstDB::iSignatureData + _iSignatureIndex; }
2529 : ASMJIT_INLINE const X86Inst::ISignature* X86Inst::CommonData::getISignatureEnd() const noexcept { return X86InstDB::iSignatureData + _iSignatureIndex + _iSignatureCount; }
2530 : #else
2531 : ASMJIT_INLINE const X86Inst::ISignature* X86Inst::CommonData::getISignatureData() const noexcept { return static_cast<const X86Inst::ISignature*>(nullptr); }
2532 : ASMJIT_INLINE const X86Inst::ISignature* X86Inst::CommonData::getISignatureEnd() const noexcept { return static_cast<const X86Inst::ISignature*>(nullptr); }
2533 : #endif // ASMJIT_DISABLE_VALIDATION
2534 :
2535 : //! \}
2536 :
2537 : } // asmjit namespace
2538 : } // namespace PLMD
2539 :
2540 : // [Api-End]
2541 : #include "./asmjit_apiend.h"
2542 :
2543 : // [Guard]
2544 : #endif // _ASMJIT_X86_X86INST_H
2545 : #pragma GCC diagnostic pop
2546 : #endif // __PLUMED_HAS_ASMJIT
2547 : #endif
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